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LVDS interface

Discussion in 'Electronic Design' started by barak shahar, Nov 16, 2006.

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  1. barak shahar

    barak shahar Guest


    I want to connect an ADC with 16 parallel CMOS outputs to the C6416 DSP
    McBsp port using LVDS and maintaining a data rate of 51.2Mbits

    the general design is using an LVDS serdes transmitter at the ADCs end,
    and a standart LVDS receiver at the DSPs end.

    how can I do so while keeping the clock restoration (at the receiver
    end) as accurate as possible?

    any advice on LVDS comm. or recommended devices is also welcomed.


    Barak Shahar
  2. Why do you want to restore a clock ? You
    could as well transmit it.

  3. barak shahar

    barak shahar Guest

    I intend to transmit it, but since im working with LVDS, the clock will
    be transmitted as a differential signal and then restored at the
    receiver. my question is wether this restoration process (using
    standart LVDS equip.) is accurate enough to prevent noise and jitter
    on the restored clock signal.
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