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low noise amplifier for high impedance source

Discussion in 'Electronic Design' started by [email protected], Oct 16, 2006.

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  1. Guest

    Hello everyone,
    I am a student who has been working on a low noise preamplifier for a
    high impedance current source. I have put the model of the detection
    circuit here:
    http://img146.imageshack.us/img146/9748/detectmodelid8.jpg
    Its a differential ac current source with an instrinsic capacitance ~
    20pF on each side. I use 1M ohm resistors to bias my input JFETs.
    The bandwidth i need is only from 10 Khz to couple of MHz.
    In my learning process, i have realized few things such as selecting
    JFETs as my input transistors for low leekage hence low input current
    noise. Maximise the value of input resistor without disturbing the bias
    of the input JFETs. However i still have couple of unanswered
    questions:
    1. How does the Cin of the JFETs effect the signal to noise. do i have
    to match the input capacitance of the JFETs to the source capacitance
    for minimum noise? How about if i put multiple JFETs in parallel to
    reduce input voltage noise - do i have to revise my JFETs selection in
    terms of input capacitance?
    2. While evaluating the performance of the designed amplifier can i
    neglect the equivalent input current noise, as i am using the JFETs?
    3. Are there any good review articles or texts for low noise
    preamplifier design (for capacitive sensors).
    Please help!
    thanks
    -arch
     
  2. Phil Allison

    Phil Allison Guest

    ** Groper alert.

    ** Do you really have a current source ???

    Or is it more like a voltage source with small series capacitance ?

    Makes a big difference.

    Assuming the latter is the case, the dominant noise source in your circuit
    is the bias resistors. A 1 megohm resistor has 130 nV / rt Hz of noise while
    a good J-FET will have only 100th of that.

    The trick is to make the bias resistors as high in value as possible and so
    allow the capacitance of your source attenuate their noise contribution. For
    each doubling the resistor value, the attenuation factor increases by 6dB
    while noise increases by only 3 dB.

    To maximise available signal voltage, make the input capacitance of the
    pre-amp as low as possible, ie install the pre-amp right next to the sensor.




    ......... Phil
     
  3. Guest

    Thanks for your reply Phil.
    ** Do you really have a current source ???
    Yes, to my understanding. The source consists of 2 electrodes (Penning
    trap). Charged particles rotate between these electrodes and induce an
    image charge. This image charge is allowed to flow in an external
    circuit (like resistors) to constituting differential image currrent
    out of the electrodes.
     
  4. Phil Allison

    Phil Allison Guest

    ** Groper alert.

    ** No I remember - YOU posted the SAME query back on July 25.

    http://groups.google.com.au/group/s...tronics.design&rnum=28&hl=en#841ce9407a2de92e


    Reckon the laws of nature have changed since then ???






    ........ Phil
     
  5. Guest

    No I remember - YOU posted the SAME query back on July 25.
    Yes i did have another post but the problem was DIFFERENT at that time.
    I don't have to think about cryogenic operation at the moment.
    The thing i want to understand is THIS:
    HOW the input transistor capacitance and my bias resistor effect the
    signal to noise ratio?
     
  6. Guest

    No I remember - YOU posted the SAME query back on July 25.
    Yes i did have another post but the problem was DIFFERENT at that time.
    I don't have to think about detecting a single charge and there is no
    cryogenic operation.
    The thing i am trying to understand is:
    How the input transistor capacitance and my bias resistor effect
    thesignal to noise ratio?
     
  7. Guest

    No I remember - YOU posted the SAME query back on July 25.
    Yes i did have another post but the problem was DIFFERENT at that time.
    I don't have to think about detecting a single charge and there is no
    cryogenic operation.
    The thing i am trying to understand is:
    How the input transistor capacitance and my bias resistor effect
    the signal to noise ratio? And i would appreciate helpful description.
     
  8. Phil Allison

    Phil Allison Guest

    ** DO NOT EDIT my posts - you fucking, know nothing Google Groper
    prick.


    ** Like BLOODY HELL it was !!!


    ** What totally irrelevant CRAPOLOGY !!



    ** YOU do not understand ANYTHING.

    Bugger off.



    ....... Phil
     
  9. trap). Charged particles rotate between these electrodes and induce an
    But this isn't really a current source. Charce delivered into a known
    capacity means a voltage, isn't it? You also can make a Current measurement
    but not by enabling the current flowing through resisitve path. Then you
    should use transimpedance amplifiers. TI have niche appnotes discussing
    noise in transimpedande amps.

    Marte
     
  10. Guest

    Hi Marte,
    Thanks for replying. Here i have the fundamental paper talking about
    the electrical model of my detector by Comisarow, which is a penning
    trap. I
    http://scitation.aip.org/getabs/ser...00069000009004097000001&idtype=cvips&gifs=Yes
    ts based on rotating monopole and in Fig. 3 and 4 the schematic is
    presented. I base almost all of my design thoughts on this paper.
    Also, thanks for the TI reference. I found one of the AN disucssing
    noise comparison of TIA and switched integrator.
    Please let me know of your thoughts regarding the source modelling.
     
  11. archiees wrote
    archiees wrote...
    The schematic you give in your .jpg drawing is

    .. |--
    .. ,---------+-------------->|-- JFET
    .. | +--/\/\-- gnd
    .. | ICT +---||--- gnd
    .. | cs |--
    .. '-(->)----+-------------->|--
    .. +--/\/\-- gnd
    .. +---||--- gnd

    where the resistors are 1M, and the capacitors 20pF. The
    signal voltage developed across a low-value resistor like
    1M will likely be much less than you like, as Phil implied.
    Resistor noise density is i_n = (4kT/R)^1/2, so you'll want
    a high R, like 100M or higher. The load capacitance will
    start reducing the signal (including the resistor noise)
    voltage above a frequency fc = 1 / 2pi R C, which is only
    8kHz for 1M, and 80Hz for 100M. So clearly you want to
    lower value of the load C if you can.

    One point, a portion of the JFET's capacitance, Crss, will
    be added to C, unless you employ tricks to prevent this.

    Once you know the signal voltage vs. current, as a function
    of frequency, you can compare it to e_n, the JFET's voltage
    noise at that frequency. You will find low e_n JFETs have
    high capacitance. Just a little gotcha from Mother Nature.

    For example, a classic 2n4392 has en = 3nV and Crss = 3pF.
    Compare this to a bf862 with en = 0.9nV and Crss = 1.9pF.
    Ooops!! Actually, that's a bad example, contrary to Mother
    Nature, as well as Murphy's Law, because the Philips bf862
    JFET is far, far better than it should be! :)
     
  12. Phil Allison

    Phil Allison Guest

    ** BEWARE: Groper Idiot on Loose



    ** My Gawd !!!

    Now *WE* have to FUCKING pay money ( US$23) to read this arrogant
    wanker's reference !!





    ......... Phil
     
  13. Guest

    Thanks Win,
    I appreciate the explaination. It makes complete sense to me now.
    Earlier, i was misled about matching the capacitance stuff.
    I have been working a design using JFETs from Interfet having en =
    5nV/rtHz @10kHz, input capacitance 25pF and CRss of 5pF. Clearly i was
    not doing the right thing and i can certainly improve by selecting the
    proper device.
    So besides the en in my frequency range and min. capacitance - sh'ldn't
    i look at the leekage current numbers as well. As i understand it would
    determine how large input resistor i can put at the input (instead of
    1M ohm) without disturbing the gate bias.
    I cannot do anything about the 20pF capacitance at the input, its
    intrinsic to the detector and i am already keeping my preamplifier as
    close as possible.
    I am sorry about the reference to the paper earlier, i thought its free
    online access - as i'm in school never encountered subscription
    problems. I have uploaded it at the following url, incase people are
    interested.
    http://www.yourfilehost.com/media.php?cat=other&file=Singnal_modelling_Comisarow.pdf
    Thanks again for helping.
    -Arch
     
  14. Phil Allison wrote...
    You don't have free access to a decent library that has it,
    or can get it for you? It's an old, basic reference in JCP,
    which is an longtime basic journal available in millions of
    libraries, and is readily available online through tens of
    thousands, if not hundreds of thousands, of libraries, etc.
    Specialized journals, like the Journal of Mass Spectroscopy,
    or Ultramicroscopy, etc., may be another matter, even though
    for many these are now among today's basic journals.
     
  15. Phil Allison

    Phil Allison Guest

    "Winfield Hill"


    ** The OP supplied a URL that *** REQUIRED ** payment to see the article.

    He apologised for the blunder and made it available freely two hours ago.

    Go shove your fuckwit opinions where the sun don't shine.





    ......... Phil
     
  16. Carl Ijames

    Carl Ijames Guest

    where the resistors are 1M, and the capacitors 20pF. The
    As Comisarow discusses in that paper, above the fc you calculate the RC
    looks like a low pass filter and so attenuates the signal voltage as the
    cyclotron frequency rises. However, the current is proportional to
    cyclotron frequency and so these offset, giving constant signal voltage
    as the frequency (and thus the mass/charge ratio) varies. Not saying
    rising signal with decreasing m/z wouldn't be nice, it's just how it
    falls out. It is convenient that the proportionality between number of
    ions of a given m/z and the signal voltage is constant, and not a
    function of m/z (assuming constant cyclotron radius).

    What kind of Penning trap system are you working on, Arch?
     
  17. On 16 Oct 2006 15:53:38 -0700,
    I don't have the 4329 datasheet, but note that the BF862's noise is
    spec'd at 100kHz. But the BF862 does seem to have a rather large gm for
    its low capacitance. When you say "contrary to Mother nature" it sounds
    as if you meant to imply "contrary to the laws of physics" which would
    imply "faked datasheet". Did you mean to say that? Personally, I
    wouldn't put anything past Philips and especially NXP.

    robert
     
  18. Robert Latest wrote...
    Its noise isn't appreciable higher at 1 to 10kHz. I'll look
    for my data and post it.
    No, I was just being funny. I suppose it's really the older
    part that's at fault in the comparison. The bf862 does what
    Philips claims, and better. IIRC, the bf862 has a higher
    gm at a given current than the '4392. JFET noise goes as
    1/gm, so that must give the bf862 a leg up. NXP or not, it's
    a nice JFET, easy to get, and cheap. What's not to like?

    Philips states an e_n = 0.8nV spec at Idss, which could be
    as high as 25mA, and even tho this is the industry-standard
    way to publish noise specs, it's not the best to my way of
    thinking. But the bf862 JFETs I measured are no more than
    1.1nV or so at 3mA, which makes them very useful parts.
     
  19. On 17 Oct 2006 04:55:28 -0700,
    1/gm or 1/sqrt(gm)? From my understanding of FETs, gm goes up with area
    -- if you parallel N FETs you get N times the transconductance, but you
    also get N times Ciss and Crss and 1/sqrt(N) the noise.

    I'm probably at least half wrong here, so please correct me.
    Nothing. I like it fine.

    robert
     
  20. Guest

    What kind of Penning trap system are you working on, Arch?
    Carl,
    We have a open cylindrical ICR cell.
     
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