Low cost and/or small size CPU in an FPGA

[hamilton]

The discussion has got me to wonder, what is the lowest cost and/or the
smallest CPU in an FPGA.

Can a CPU with reasonable code space fit into a 44 pin FPGA ?

Are there any 44 pin FPGAs ?

hamilton

 

[Uwe Hercksen]

Can a CPU with reasonable code space fit into a 44 pin FPGA ?

Hello,

if we only look for the needed pins, these CPUs would fit:
separate 8 bit data and 16 bit address bus
separate 16 bit data and 16 bit address bus
separate 16 bit data and 20 bit address bus
multiplexed 16 bit data and address bus
multiplexed 16 bit data and 32 bit address bus
multiplexed 32 bit data and address bus

The number of gates necessary depends on the size of the instruction
set. A RISC CPU with serial processing in the ALU would be slow but small.

Bye

 

[[email protected]]

The discussion has got me to wonder, what is the lowest cost and/or the
smallest CPU in an FPGA.

Can a CPU with reasonable code space fit into a 44 pin FPGA ?

Are there any 44 pin FPGAs ?

hamilton

I think limiting factor is usually memory, not the cpu

guess you could do something with an external serial flash
some of them a quite fast, and it wouldn't take much logic
to take advantage of the read address auto increment


-Lasse

 

[hamilton]

I think limiting factor is usually memory, not the cpu

guess you could do something with an external serial flash
some of them a quite fast, and it wouldn't take much logic
to take advantage of the read address auto increment


-Lasse

Ok, my goal.

I need a uP and some logic, but I would like to do it with one part.

208 pins just won't fit into my package.

Thanks

hamilton

 

[Nico Coesel]

The discussion has got me to wonder, what is the lowest cost and/or the
smallest CPU in an FPGA.

I've used the Picoblaze CPU from Xilinx in several projects. AFAIK
that is the smallest useful FPGA cpu.

 

[rickman]

Ok, my goal.

I need a uP and some logic, but I would like to do it with one part.

208 pins just won't fit into my package.

Have you looked at any of the FPGA lines yet? If package is a big deal,
you need to pull up some data sheets and check out the packages.

The parts I have used or will be using are the XP from Lattice in the
100 pin QFP and the iCE40 also from Lattice in several useful packages.
The iCE40 data sheet shows a 32 pin QFN, an 84 pin QFN and 100 and 144
pin QFP. Everything else is some fine pitch BGA which I prefer not to
use because of the small drills and fine pitch required of the PCBs.

Xilinx and Altera may have some parts in non-BGA packages too, I'm not
so familiar with those lines. Both of the Lattice families I mention
have on chip Flash or one time programmable memory. That saves a chip
or two for programming.

 

[rickman]

The discussion has got me to wonder, what is the lowest cost and/or the
smallest CPU in an FPGA.

Can a CPU with reasonable code space fit into a 44 pin FPGA ?

Are there any 44 pin FPGAs ?

BTW, you might want to post this to comp.lang.forth They discuss MISC
often there.

 

[John Devereux]

Ok, my goal.

I need a uP and some logic, but I would like to do it with one part.

208 pins just won't fit into my package.

ADUC702x has a quite simple programmable array (just combinatorial
IIRC).

 

[hamilton]

I want to thank everyone that made suggestions.

I have discovered the SAM4S 120Mhz processor in a 48-pin package.

The I/O pins may be able to do in software what I wanted the logic to do
on a slower processor.

I can create a 100nSec pulse in software.

hamilton