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Low bias current opamps

Discussion in 'Electronic Design' started by Jeroen, Nov 7, 2012.

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  1. Jeroen

    Jeroen Guest

    I was playing today with a little ionization chamber amplifier,
    which is an exercise in high-impedance design. My usual business
    revolves around wideband RF amplifiers, so this is unfamiliar
    territory for me.

    I selected an LPC661 opamp which has a specified maximum Ib of
    4pA, but with a typical value stated to be 2fA. That's a very
    large difference, which, I guess, is motivated by the need to
    minimize testing time. It takes a while to measure fA
    currents with some precision.

    It appears I got lucky: Its measured Ib comes out at an amazing
    170aA! I'm impressed. I hadn't yet noticed some opamps had gotten
    *that* good.

    Jeroen Belleman
  2. Guest


    You can make it even better--Pease wrote an ap note on nulling the
    LPC661's Ib by varying / bootstrapping the supplies.
  3. Fred Bartoli

    Fred Bartoli Guest

    Jeroen a écrit :
    When I did my 200pV/rtHz preamplifer with some huge Interfet IF3602 I
    was very pleasantly surprised the IG was under one pA at 20mA Id, for it
    to be spec'ed at 0.5nA max in off state which is generally more
    favorable due to the lack of impact ionization. (Ok, I run them a real
    low VDS).
  4. miso

    miso Guest

    Yes to minimizing test time, leakage in the DUT board, handler, etc.
    plus guard-band. The parts also tend to get charged sliding on the
    handler, so these kinds of measurements are really tough in production.

    It only has 1000v ESD. I assume the protection structure is minimal.
  5. for low bias : how about the LMP7721 ?
    "the industry's lowest guaranteed input bias current precision amplifier.
    The ultra low input bias current is 3 fA, with a guaranteed limit of ±20 fA
    at 25°C and ±900 fA at 85°C."

    the classic is the LMC6001

    also I guess you may have seen ,"what's all this teflon stuff" by Bob Pease.,1562,4,00.html,1562,5,00.html

    Jure Z.
  6. I made it an integrator with a 10pF feedback capacitance. The
    output drifts slowly and linearly at about 17uV/s. It drifted
    a mere volt since yesterday afternoon! There is a plot of the
    voltage vs. time curve at <>.
    The steeper part near the start is where I put something slightly
    radioactive nearby.

    Jeroen Belleman
  7. Yes, I looked at that one before I discovered the LPC661.
    I decided to give it shot, with the result as described.
    An LMP7721 is ten times the price, supposedly because of
    the cost of testing it for that low Ib.
    Yes, of course.

    Jeroen Belleman
  8. I think that chip is what is used as the front end in current Keithley
  9. Jon Kirwan

    Jon Kirwan Guest

    An interesting note also appears on page 9, second column, of
    the LPC661 datasheet. It says:

    "When one wishes to take advantage of the ultra-low
    bias current of the LPC661, typically less than
    0.04 pA, it is essential to have an excellent layout."

    Note that here it seems to provide yet another kind of spec:
    a "typically less than" spec of 40fA.

    So "max" is 4pA, "typical" is 2fA, and "typically less than"
    is 40fA. ;)
    Did you take note of their comment, "the leakage of the
    capacitor and socket must be taken into account?"

  10. Yes, the input node is in the air. In fact, the whole package
    is sitting on top of the bypass caps. It's just a quick
    lash-up to see what could be done. The capacitor is a 1206
    NP0 ceramic. If it had been significantly leaky, I would have
    seen a hint of an exponential curve. Over the time scale I
    have been taking data (~20 hours), there is no sign of that

    Jeroen Belleman
  11. Uwe Hercksen

    Uwe Hercksen Guest


    but what about the 10pF feedback capacitance and its leakage current?
    Are you sure that the output drift is caused by the bias current only
    and is not influenced by the leakage current of the capacitor?

  12. Interesting that the data sheet shows the part in "hermetic package"
    to be more than 10x worse leakage (but no hermetic packages are shown,
    just DIP and SOIC).
  13. Jon Kirwan

    Jon Kirwan Guest

    If the leakage were voltage-dependent, yes. Is there any
    mechanism by which there might be leakage that is fixed
    rather than dependent on applied voltage across it? (I can't
    think of one. So I think I agree with you. But the question
    has to be asked. What happens if the capacitor is left in
    free air unattached? I'm thinking about the outside
    environment in which all this is contained. And again, I
    can't think of any reason to imagine different from what you

  14. miso

    miso Guest

    What page are you on?

    The bold face limits are over temperature, so the military ("M") part
    has a higher leakage limit over temp. [100pA versus 4pA.]

    What I find confusing is the Ib limit on datasheet page 2. The
    industrial temp range devices will have no leakage higher than 4pA over
    temperature. But the military part can leak as much as 20pA at 25 deg C.

    Upper right graph on PDF page 5 (numbered page 4). "Input Bias Current
    vs. Temperature".
    Strange- maybe that limit is actually tested? I see datasheets from
    as far back as 2001 that are exactly the same regarding the
    above-mentioned two points.

    Best regards,
    Spehro Pefhany
  16. miso

    miso Guest

    Well as you know, only the electrical test limits (in theory) can be
    trusted. The curves are guidelines. The story I was always told about
    electrical limits is the customer gets the right to return a part for a
    replacement if the part fails electricals. Since nobody does incoming
    inspection these days, that means a lot of crap gets shipped if the
    vendor has poor quality. [Note the manufacturers flow usually has a QA
    test for each lot on a sample basis to insure the test hardware wasn't
    fubar. QA test is probably over temperature. ]

    Anyway, I see your point and the datasheet doesn't make sense. I can't
    think of anything in a ceramic package that would cause it to leak more
    than plastic. I assume they don't put carbon black in this plastic
    package, but that could make it worse than ceramic.

    Some manufacturers put goop over the chip prior to the plastic going
    around the leadframe. I assume that goop has high resistivity.
  17. josephkk

    josephkk Guest

    Cool. I had not noticed that they had gotten that good either, but it did
    not surprise me. How is the offset voltage?

  18. Guest

    Plastic: 1e16 ohms. Ceramic: 1e14 ohms. Pease says so.
    James Arthur
  19. miso

    miso Guest

    Plastic: 1e16 ohms. Ceramic: 1e14 ohms. Pease says so.
    I found a spec for ceramic, which runs 1e14 to 1e16 ohm meter. Did Pease
    drop the units?

    In a ceramic package, you generally solder the die bottom to the metal
    inside the package. [I think they call it a scrub. I've never that step
    done.] Now since the resistance is volumetric, the metal on the inside
    of the package certainly has a decent contact to the ceramic. Actually
    it approaches the ideal metal plate used in the typical description of
    how you define volumetric resistivity.

    In a plastic package, the part sits on a paddle in the leadframe, which
    can be isolated. But it also has contact to the plastic. Visualizing
    this, it seems like both packages have significant contact to the
    insulating material.

    But it is possible in a plastic package to put the chip on "glass
    beads." That floats the substrate contact. I don't know if that scheme
    is possible for ceramic packages. Obviously if we had a packaging
    engineer on the list it would be far better than someone who has just
    had chips packaged.

    I haven't found a spec on the plastic resistivity.
  20. Am 10.11.2012 01:36, schrieb miso:
    The sealing glass in those cheap non-sidebrazed ceramic Eproms produced
    so much water during fritting that it already was corrosive.

    regards, Gerhard
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