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Looking for two-input comparator with hysteresis

K

krw

Jan 1, 1970
0
I doubt that the national power grid will be, at any instant, much
more than a second ahead or behind, and longterm it's perfect.

Ignoring failures (which my "PLL" scheme attempts to compensate
for).
 
K

krw

Jan 1, 1970
0
Exactly one square output cycle per sine input cycle, forever, sounds
fairly predictable to me.


Some day I'll explain ESD diodes to you, if you ask real nice.

....and why you *really* don't want to use them as part of your
circuit, I presume.
 
J

Jim Thompson

Jan 1, 1970
0
Exactly one square output cycle per sine input cycle, forever, sounds
fairly predictable to me.


Some day I'll explain ESD diodes to you, if you ask real nice.

John

You are SO-O-O-O funny!

...Jim Thompson
 
J

John Larkin

Jan 1, 1970
0
...and why you *really* don't want to use them as part of your
circuit, I presume.

OK, why not? I's been a couple of decades since people figured out
CMOS latchup and took suitable precautions. Modern HC parts are spec'd
to handle numbers like 50 mA without problems.

John
 
J

Jim Thompson

Jan 1, 1970
0
OK, why not? I's been a couple of decades since people figured out
CMOS latchup and took suitable precautions. Modern HC parts are spec'd
to handle numbers like 50 mA without problems.

John

The "suitable precautions" only prevent frying. They don't prevent
copious amounts of substrate current flow... substantially more than
you inserted, due to PNP action.

The "diodes" (they're actually isolation tubs that, with the adjacent
diffusions, can act as bipolar transistors) are only rated for
transient ESD events, NOT for clamping slow signals.

But go ahead and use them as clamps... I certainly don't care if your
circuits up and fry for "magical" reasons.

I NEVER rely on ESD diodes for clamping... VERY BAD engineering
practice.

...Jim Thompson
 
J

John Larkin

Jan 1, 1970
0
The "suitable precautions" only prevent frying. They don't prevent
copious amounts of substrate current flow... substantially more than
you inserted, due to PNP action.

The "diodes" (they're actually isolation tubs that, with the adjacent
diffusions, can act as bipolar transistors) are only rated for
transient ESD events, NOT for clamping slow signals.

But go ahead and use them as clamps... I certainly don't care if your
circuits up and fry for "magical" reasons.

I NEVER rely on ESD diodes for clamping... VERY BAD engineering
practice.

...Jim Thompson


The only "bad engineering practice" is doing something that doesn't
work. But usually BEP means "something I don't like."

Suppose I set up an HC14 and provide for measuring Icc. Now I force a
range of + and - currents into one input. Things that might happen
are...

1. Some parasitic transistor is turned on and Icc increases.

2. Some parasitic SCR turns on and the whole chip latches.

3. Some other phenom that I can't predict.

4. One of the above, plus the output level gets wrong.

5. None of the above, the diodes act like diodes.


So which will happen? If you'll make predictions, I'll go into the lab
and try it.

John
 
J

Jim Thompson

Jan 1, 1970
0
The only "bad engineering practice" is doing something that doesn't
work. But usually BEP means "something I don't like."

Suppose I set up an HC14 and provide for measuring Icc. Now I force a
range of + and - currents into one input. Things that might happen
are...

1. Some parasitic transistor is turned on and Icc increases.

2. Some parasitic SCR turns on and the whole chip latches.

3. Some other phenom that I can't predict.

4. One of the above, plus the output level gets wrong.

5. None of the above, the diodes act like diodes.


So which will happen? If you'll make predictions, I'll go into the lab
and try it.

John

Hard to predict... but it'll be brand dependent. ESD structures are a
black art and are different for every foundry.

Why don't you try it and report back (and specify brand of 'HC14)?

...Jim Thompson
 
S

Spehro Pefhany

Jan 1, 1970
0
The only "bad engineering practice" is doing something that doesn't
work. But usually BEP means "something I don't like."

Suppose I set up an HC14 and provide for measuring Icc. Now I force a
range of + and - currents into one input. Things that might happen
are...

1. Some parasitic transistor is turned on and Icc increases.

2. Some parasitic SCR turns on and the whole chip latches.

3. Some other phenom that I can't predict.

4. One of the above, plus the output level gets wrong.

5. None of the above, the diodes act like diodes.


So which will happen? If you'll make predictions, I'll go into the lab
and try it.

John

I vote for 1, with Icc increasing somewhat, but less than the input
current, for the < ~ +/-100uA we're talking about. No effect on the
output.
 
Z

Zak

Jan 1, 1970
0
Jim said:
But go ahead and use them as clamps... I certainly don't care if your
circuits up and fry for "magical" reasons.

I NEVER rely on ESD diodes for clamping... VERY BAD engineering
practice.

I used them (on a once-off) as power supply rectifier even :)

74HCsomething sync amplifier to use in-line with a monitor that wanted
TTL sync while the computer output <1v. The monitor input carries no
voltage, thus I had to use external power. I thought.

When I disconnected the power the device kept working. I guess the
monitor presented a pull-up when activity was sensed and this powered
the device through the protection diode.


Thomas
 
J

John Larkin

Jan 1, 1970
0
I used them (on a once-off) as power supply rectifier even :)

74HCsomething sync amplifier to use in-line with a monitor that wanted
TTL sync while the computer output <1v. The monitor input carries no
voltage, thus I had to use external power. I thought.

When I disconnected the power the device kept working. I guess the
monitor presented a pull-up when activity was sensed and this powered
the device through the protection diode.


Thomas

That's a famous CD4000-series feature; remove power, and the logic
keeps working from the logic input swings. Of course, the original
4000's were notorious for SCR latchup if you pushed any current
through the esd diodes.

John
 
S

Spehro Pefhany

Jan 1, 1970
0
I used them (on a once-off) as power supply rectifier even :)

74HCsomething sync amplifier to use in-line with a monitor that wanted
TTL sync while the computer output <1v. The monitor input carries no
voltage, thus I had to use external power. I thought.

When I disconnected the power the device kept working. I guess the
monitor presented a pull-up when activity was sensed and this powered
the device through the protection diode.

Thomas

A broken Vdd trace can turn a CMOS NAND gate into an EX-OR gate.
Don't ask...


Best regards,
Spehro Pefhany
 
R

Rich Grise

Jan 1, 1970
0
The "suitable precautions" only prevent frying. They don't prevent
copious amounts of substrate current flow... substantially more than
you inserted, due to PNP action.

The "diodes" (they're actually isolation tubs that, with the adjacent
diffusions, can act as bipolar transistors) are only rated for
transient ESD events, NOT for clamping slow signals.

But go ahead and use them as clamps... I certainly don't care if your
circuits up and fry for "magical" reasons.

I NEVER rely on ESD diodes for clamping... VERY BAD engineering
practice.

I've always used diodes, but not for any reason I learned in school - for
one thing, the data sheet recommends them, and for the other, every piece
of "real" equipment I've ever worked on, from military avionics to video
games and pinball machines, used diodes.

That is on I/Os that go off-board, so I'm probably not even talking about
the same thing, but in this case, I'd use diodes, just because it feels
more comfortable.

That's my position, and I'm sticking to it! ;-)

Cheers!
Rich
 
P

Pooh Bear

Jan 1, 1970
0
Joerg said:
Hello Keith,


You just hook up a piezo and count the clicks :)))

But seriously, if his clock has a uC it might already contain Schmitt
inputs. Or at least a comparator that can be "schmitted". All it then
takes is an RC to get rid of the bulk of the noise issues.

If the clock uses a uC then it already probably has a crystal. Use that instead
of 50/60Hz. In fact..... this clock will get the time wrong if it's on the wrong
supply.

Graham
 
P

Pooh Bear

Jan 1, 1970
0
Keith said:
Both. But when people ask these sorts of questions I'm primarily
worried about them, rather than some magic smoke.

Since just about every opto is safety approved, farnkly why bother ?
You can do that because it is isolated (sometimes it's unclear
exactly what someone is intending). I'd still vote for the
suspenders to go along with the belt. Optical isolators are cheap
and may not add anything to the BOM.

You're *joking*. On a cheap consumer product every single component that's not
actually needed isn't there.

Graham
 
P

Pooh Bear

Jan 1, 1970
0
Robert said:
On Tue, 23 May 2006 14:44:51 -0400,


That's nuts. If your circuit is directly connected to the transformer's
secondary, an optical isolator (OI) gains nothing in case of transformer
isolation failure.

If it's a 'live chassis' design you don't even need an opto. A cheap 'n cheerful
npn transistor and 2 or 3 resistors will do the job. Actually, thinking a bit
more, if it's using a line frequency power transformer you don't need an opto
either. Use the ac from the transformer secondary.

Graham
 
P

Pooh Bear

Jan 1, 1970
0
krw said:
NO, I'm saying that an isolation must be used (think series). It
wasn't clear that he was tapping off an isolated secondary.

Power maybe ? I can't see anyone designing a battery clock that has to be
connected to the mains to get its reference frequency !

Graham
 
P

Pooh Bear

Jan 1, 1970
0
Christopher said:
The transformer has a tapped winding. The first part of the winding is
connected to a linear power supply which provides the 5 V for the TTL.
The second part provides the 50 Hz signal which is to be counted.

You don't even need 2 secondaries. Take the power line frequency reference from
the same secondary as used for power. In volume manufacture of this kind of
product an extra winding is expensive.
I'm
proposing to connect one end of the second part of the winding

In my example, the same winding as used for power. It would want to be a centre
tapped winding though with the centre tap to circuit ground.
to the
Schmitt trigger input,

Via a potential divider ( to limit the voltage ) and a diode ( to avoid applying
reverse volts to the gate ). Add a small cap of suitable size at the schmitt
input to Rc low-pass filter the signal ( the R is provided by the potential
divider ).
and the other end to the lower TTL power rail.

Eh ? Oh 0V . Yes.
Current could flow from the first part of the winding, through the
linear power supply, through the lower power rail, and back into the
second part of the winding.

Uh ? I think you think wrong.
I think the circuit might still work if I
just connected one end of the second part of the transformer winding to
the Schmitt trigger input,

Yes, via the PD and filter cap.
and left the other end unconnected,

No. It would need to go to circuit ground ( 0V or what you called lower TTL
power rail - i.e the negative or return side )
but this
doesn't seem quite right as one end is left floating.

Yes. It's not quite right.
Taking the signal
from one end of the winding only doesn't seem quite right.

Indeed.

Graham
 
P

Pooh Bear

Jan 1, 1970
0
John said:
but insert a
100K resistor in series, then a 22 nF cap to logic ground. That will
both limit schmitt input current

I think you mean stop the magic smoke don't you ?

Graham
 
P

Pooh Bear

Jan 1, 1970
0
Joerg said:
Hello John,


That's pretty much how I have seen it done. Also, it is not necessary to
provide a "personal winding" to the Schmitt input (although it might
make the Schmitt feel really important, if Schmitts have feelings...).
Most of the time both sides of the transformer are used for power, for a
more efficient rectification. Then the 100K just goes to one winding
before the diode.

You're a man after my own heart Joerg !

Graham
 
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