J
Jim Thompson
- Jan 1, 1970
- 0
There was a series of posts in the past few weeks concerning
translating a 3.3V logic level into 5V logic.
I have posted here...
http://www.analog-innovations.com/SED/LogicLevelTranslator.pdf
the basic concepts, and also created a simulation mockup using the
venerable CD4007.
This structure consumes no static power other than leakage.
There is some "kinkiness" in the waveforms. I don't know if it's due
to the long channel-length of the CD4007 devices or the VERY poor
device models (Level=1 and Level=2 was all I could find).
I've done this trick quite successfully on custom chips where I could
scale the devices to suit my needs.
Maybe someone will construct this with a CD4007 and report back?
(Beware, wire exactly as shown... pin 14 must go to +5V to prevent
tub/body diode conduction.)
...Jim Thompson
translating a 3.3V logic level into 5V logic.
I have posted here...
http://www.analog-innovations.com/SED/LogicLevelTranslator.pdf
the basic concepts, and also created a simulation mockup using the
venerable CD4007.
This structure consumes no static power other than leakage.
There is some "kinkiness" in the waveforms. I don't know if it's due
to the long channel-length of the CD4007 devices or the VERY poor
device models (Level=1 and Level=2 was all I could find).
I've done this trick quite successfully on custom chips where I could
scale the devices to suit my needs.
Maybe someone will construct this with a CD4007 and report back?
(Beware, wire exactly as shown... pin 14 must go to +5V to prevent
tub/body diode conduction.)
...Jim Thompson