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LM10 Reference...

Discussion in 'Electronic Design' started by Rich, Mar 24, 2006.

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  1. Rich

    Rich Guest


    1) I'd like to use the opamp portion of an LM10 as a comparator and the
    reference portion to set the Vp input for the comparator. Vn will be
    compared to the reference at Vp. Now, I'd like to adjust the input to Vp
    of the opamp to a factor of 200mV (x * 200mV). So I think all I have to do
    is use the reference feedback from pin-8 to pin-1 (R2) and tie pin-8 to GND
    through R1. I'm using the pin out for the DIN package. I think this just
    sets the gain for the reference output to 200mV * (R1+R2)/R1...just like a
    normal non-inverting amp. Is that correct?

    2) Also, for the comparator portion, it's my understanding that what makes a
    comparator unique is that there is no feedback and the opamp will not
    operate linearly. Thus, when Vp - Vn > 0 you get V+ (or near it) and when
    Vp - Vn < 0 you get V- (or near it). That said, I've come across some
    circuits lately with a very large resistor in the feedback path of what I
    surmise is a comparator (1-10 MOhm). What would be a good reason for this?
    I think the value is so high that VERY little current will flow; however,
    I'm curious as to the practice.

  2. Probably POSTITIVE feedback to give the comparator a taste of
    hysteresis. Otherwise the output could bounce around from noise or
    oscillate for differential inputs that are close to zero. By fiddling
    with the feedback you can achieve a circuit that does something like
    go low for inputs > 2.0V and go high for inputs < 1.0V, and maintain
    the previous state for voltages from 1.0 to 2.0V.


    Vh ---------+----->------+
    | |
    | |
    | |
    | |
    Vl +-----<------+------------

    0 1.0V 2.0V

    -----> Vin

    Often much smaller amounts of hysteresis are used, of course.

    Best regards,
    Spehro Pefhany
  3. Guest

    As Spehro has said, this will work. Keep in mind that an op amp is
    never a very good comparator - compators are designed to spend most of
    their time saturated, and to come out of saturation very quickly, while
    op amps are designed on the basis that they will spend all the time
    un-saturated, so that when they do saturate, the designer hasn't gone
    to any troulbe to prevent the accumulation of stored charge in
    transistor bases in the ampliifer chain. I've seen horror stories about
    741 amplifiers exhibiting propapagation delays of 500usec when used as
    As Sphero says, this 10M resistor is almost certainly providng a bare
    minimum of positive feedback/hysterisis to prent the comapator
    oscillating near threshold.
  4. Jim Thompson

    Jim Thompson Guest

    On 24 Mar 2006 02:36:09 -0800, wrote:


    But it's not due to _device_ storage, it's due to the compensation cap
    being charged against a rail and the very small currents available to
    discharge it.

    ...Jim Thompson
  5. Guest

    Another misconception bites the dust. Thanks Jim.
  6. Jim Thompson

    Jim Thompson Guest

    Yep. It takes a mighty big device, like power BJT's, to store for a

    ...Jim Thompson
  7. Rich

    Rich Guest

    Well I've been RTFingM today...probably dangerous now...haha. So if I want
    to design in some hysteresis, how do I go about that? Do I use the input
    bias current (~20nA) and multiply by the large feedback resistance? Will
    this be the amount of hysteresis I will have? Will it center around Vref
    input because when the opamp/comparator is at Vcc I sink 20nA back to Vp
    and when it's at Vee I source 20nA from Vp to the output? Ex: In my case,
    Vref=1.7Vdc (8.5 * 200mV) so will I center at 1.7 - hyst when the output is
    at Vee and at 1.7 + hyst when the output is at Vcc?

    Is it better to use POSITIVE feedback to the reference input (Vp) of the
    opamp OR to use NEGATIVE feedback to the (Vn) input? And most importantly,
    why? I like the idea of using the Vp input in this case because it change
    the reference value (1.7) slightly depending on whether the opamp is
    saturated at Vcc or Vee. That said, I have no other technical merits to
    offer as to why POSITIVE feedback would be better.

    Also, once I add a large resistor I think I need to try and match the dc
    resistance as seen by the opamp inputs. That large resistor has an impact
    even if the input bias current is only 20nA! So let's say thst R1=1.87k
    and R2=10k and I use 1MOhm for the feedback hysteresis. To match the dc
    resistance seen by the opamp inputs I think I need to add ~1.5k from the
    reference output to Vp, sound right?

    And finally, this would probably be a whole lot easier for those reading if
    I showed an ASCII schematic! What tool is available for this? Any linux
    compatible alternatives? I was about to use VIm but was lazy!

  8. No, you usually want to use resistors of low enough value (or matched
    well enough) that the input bias current doesn't have much effect.
    It's not known very well, nor is it very stable with temperature.

    Suppose you have the output swinging from 0 to 5V, with a 1K resistor
    on the non-inverting input ( to ground or to a low-impedance source)
    and a 1M feedback resistor. That means you'll have 5mV of hysteresis.
    5V * 1K/(1K + 1M) = 5.0mV

    Positive feedback gives you hysteresis, negative feedback gives you
    gain that is lower than the open loop gain (or maybe oscillation, but
    that's another story).
    I don't know about your exact circuit, but 20nA * 1.5K is only 30uV,
    which isn't worth worrying about in most cases, unless you're working
    with really low-level DC signals (eg. from an R, S or B
    thermocouple). Vos on this part is 2,000uV with a drift that isn't
    specified, but typically is 2-5uV/K, which isn't great.
    You can try Andy's (Andreas Weber's) AACircuit from here:

    Best regards,
    Spehro Pefhany
  9. Rich

    Rich Guest

    +-------10k-------+ +--------1MOhm-------+
    | | | |
    | | | +14Vdc |
    | +----------+ | | | |
    | |lm10 ref | | | | |
    +---+---+Vn | | | +----+-----+ |
    | | | | | |lm10 opamp| |
    | | | | | | | |
    | | +--+---1.5k------+--+Vp | |
    | | | | | |
    | |bal | | out+------+-------0
    | | | | | Vout
    | +----------+ +----+Vn |
    1.33k | | |
    | | +----+-----+
    | | |
    | battery>>> 0------10k-------+ |
    | input | |
    | | |
    | 1.87k |
    | | |
    | | |

    1) Added 1.5k because Vn of opamp part "sees" 1/(1/10k + 1/1.87k) or 1.575k
    2) The battery input will be ~10.8 when near 1.7 (Vref compare value)
    3) 10k and 1.33k create 8.5 gain >>> 200 mV * 8.5 >>> Vref = 1.7
    4) Added 1Mohm for some hysteresis...Now here's where I'm still a bit lost.
    So my output swings from 0 to 14 Vdc. So the only low impedance path I
    see is through 1.5k + 10k + 1.33k >>> 12.83k. So can I expect hysteresis
    of 14 * [12.83/(12.83 + 1M)] = 177 mV? So the Vp input varies from an
    ideal of 1.7 when Vout is ~0 to (1.7 + 0.177) when Vout is 14?
    That makes better sense now. Thanks.
    I will use for Windows and try it with wine in Linux!
  10. John  Larkin

    John Larkin Guest

    But if you're in no hurry, an opamp makes a nice comparator that won't

    Actually, adding external hysteresis to a comparator is tricky. Most
    comparators have multiple, fast gain stages so have a lot of delay
    relative to output risetime. So it's entirely possible that a fast,
    noisy signal will send bubbles of noise through the gain chain
    *before* the output changes enough to kick in the hysteresis. So you
    can propagate multiple edges through, and the hysteresis doesn't help
    much. This can be unholy hell slicing something like a DDS output.

    An opamp, usually having a single dominant pole, doesn't have this

    A few comparators have internal hysteresis, a nice idea.

  11. Jim Thompson

    Jim Thompson Guest

    As in my venerable MC1560/61 design... designed in the mid '60's,
    fastest on earth till almost present time.

    (Latch feature was actually done using increased/insurmountable

    ...Jim Thompson
  12. Phil Hobbs

    Phil Hobbs Guest

    Brr. I've never seen that one, but it sounds like huge fun to debug.
    If you put at least a second-order filter on the DDS output, the slope
    of the output won't change immediately due to a narrow glitch or
    settling transient, the way it does with a first-order filter. Even two
    cascaded RCs are usually enough for this. The order of the filter is
    sometimes as important as the bandwidth.
    Adding hysteresis by positive feedback also tends to put sharp-edged
    junk back out the + inputs. The 1560 and MAX900 latches are in the
    input structure, so you can put an RC differentiator between the output
    and the latch--which gives most of the benefits of hysteresis, puts
    nothing back out the input, and gives you a nice guaranteed minimum
    pulse width. (*)

    Disadvantages are: it only works in one polarity; it'll chatter with a
    signal that sits right at the threshold; and you have to give the RC
    time to discharge between pulses, like a POR.


    Phil Hobbs

    (*) Latches in the output structure tend to misbehave when you do this,
    because the propagation delay between latch and output can be less than
    the rise time.
  13. Jim Thompson

    Jim Thompson Guest

    Neeeerp! The MC1650/51 (sorry about the part-number typo above)
    hysteresis is in the level translation from input stage to output
    stage... I figure I ought to know, I designed it. See MC1650 PDF on
    my website and the patent, 3,638,041

    ...Jim Thompson
  14. Phil Hobbs

    Phil Hobbs Guest

    Hmm. Must have changed in the last couple of years then.... Here's a
    post of yours from the last time we discussed this point.... ;-)


    Phil Hobbs
  15. Jim Thompson

    Jim Thompson Guest

    I should have said "reflects to the input". The hysteresis appears in
    the collector loads of the first stage. See the PDF, posted in the
    past year when I got around to it.

    ...Jim Thompson
  16. John  Larkin

    John Larkin Guest

    Our benchtop delay generator uses an AD9832 DDS as the reprate
    generator, and the 5-pole elliptic filter recommended by ADI. We tried
    various fast comparators, with various amounts of hysteresis, and got
    nasty jitter or multiple edges at various frequencies. The best thing
    turned out to be a Tiny Logic schmitt trigger.

    The elliptic filter is maybe not the best choice. It's optimized for
    frequency-domain behavior, but has a purely capacitive signal path
    mode, which I guess transmits glitches. And, as noted, a fast
    comparator can do all sorts of things before the external hysteresis
    loop wakes up. The HC schmitt is dirt cheap and has a large amount of
    real, unteasable hysteresis. Of course, you have to cheat on the DDS
    output compliance spec, but life's never perfect.

    Lately, in their datasheets and appnotes, ADI doesn't even mention the
    fact that their DDS chips need hairy antialiasing filters. The filters
    are more expensive and a lot bigger than the chips themselves.

    Aside: Sometimes you can solve a problem by asking about conservation
    of energy, and sometimes you can figure something out by asking "how
    many bits of information could this component possibly store?"

    Need coffee.

  17. Guest

    says its worst case propagation delay can be as high as 5.7nsec - only
    marginally faster than the almost equally venerable Am685 (Giles J N
    and Searles 1972 Electronics 45 112-7) and slower than the Plessey

    which gives a worst case propagation delay of 3nsec at 25C, 4nsec over
    the full temperature range. Plessey sent me a free sample around 1978,
    so your "almost present time" would seem to be back in the late 1970's

    The Analog Devices AD96685

    offered 2.5nsec typical, 3.5nsec worst case and we used quite a few of
    those around 1989/90.

    Which earth do you think you are living on?
  18. John  Larkin

    John Larkin Guest

    Surely not the one where people are gracious, grateful, or polite.

  19. Jim Thompson

    Jim Thompson Guest

    Of course, at my age that's just yesterday ;-)
    This one. However a lot of those faster devices were cantankerous as
    hell to keep from oscillating... the MC1650/51 never was... and I
    designed it ~1965.

    ...Jim Thompson
  20. Guest

    This is a known problem for regular two-pole Sallen and Key low-pass
    filters. Adding a (buffered) passive single pole in front of the
    two-pole stage can improve the behaviour at frequencies appreciably
    above the 3dB frequency.

    And I don't like elliptic filers for cleaning up DDS outputs - when
    Frank Bemelman and I were looking at the problem, I got enthusiastic
    about Bessel filters, This was about two and half years ago, and I
    can't remember why I went that way - I think it had to do with ringing
    on step edges.
    The DDS chips have got a lot faster in recent years, and you only need
    hairy filters if you want to use the DDS to synthesise frequencies up
    close to the DDS clock rate.

    If Analog Devices were recommending elliptic filters, the application
    engineer probably ended up get a flea in the ear from a dissatisfied
    customer - Bob Pease and Jim Williams aren't representative application
    engineers, and while Analog Devices does have lots of good people,
    nobody has ever worked out how to avoid hiring the occasional
    plausiable idiot.
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