Maker Pro
Maker Pro

LC Oscillator Questions

A

Anthony Fremont

Jan 1, 1970
0
Pictures available in ABSE

The top trace (yellow) is taken between C4 and R2. The bottom trace (cyan)
is taken at the base of the transistor. There is a switchercad file, but
the simulation will show allot of distortion that really isn't present in
the prototype circuit, because of lots of circuit capactance I suspect. R1
was something I was playing with to try and tame the voltage across L1/C3
being applied to the base.


Hello all,

I was tinkering with this LC oscillator (Colpitts/Clapp) this weekend. I
arrived at the values of C1 and C2 empirically after starting with a crystal
oscillator circuit. The values in the original circuit created a horrid
waveform that looked allot like the simulation. After much tinkering around
and simulating, I come to the conclusion that getting a perfect waveform is
nearly impossible, especially with big swing. It seems that the transistor
likes to take a bite out of the right half of the peak of the wave.

What is the secret to beautiful waveforms? Do I need another LC resonator
on the output to fix it up? I mean, I'm getting a pretty nice wave now, but
there is still some distortion that you can just see at the top of the peaks
on the yellow trace.

How do you control the peak voltages of an LC resonattor without mangling
the waveform? The waveform at the junction of L1/C3 is of course quite
beautiful, how do I get it from there to the output? ;-)

I realize that I will need a buffer stage(s) before I can make any real use
of the signal, but I want the input to the buffer to be as perfect as
possible.

Thanks :)
 
K

K7ITM

Jan 1, 1970
0
Pictures available in ABSE

The top trace (yellow) is taken between C4 and R2. The bottom trace (cyan)
is taken at the base of the transistor. There is a switchercad file, but
the simulation will show allot of distortion that really isn't present in
the prototype circuit, because of lots of circuit capactance I suspect. R1
was something I was playing with to try and tame the voltage across L1/C3
being applied to the base.

Hello all,

I was tinkering with this LC oscillator (Colpitts/Clapp) this weekend. I
arrived at the values of C1 and C2 empirically after starting with a crystal
oscillator circuit. The values in the original circuit created a horrid
waveform that looked allot like the simulation. After much tinkering around
and simulating, I come to the conclusion that getting a perfect waveform is
nearly impossible, especially with big swing. It seems that the transistor
likes to take a bite out of the right half of the peak of the wave.

What is the secret to beautiful waveforms? Do I need another LC resonator
on the output to fix it up? I mean, I'm getting a pretty nice wave now, but
there is still some distortion that you can just see at the top of the peaks
on the yellow trace.

How do you control the peak voltages of an LC resonattor without mangling
the waveform? The waveform at the junction of L1/C3 is of course quite
beautiful, how do I get it from there to the output? ;-)

I realize that I will need a buffer stage(s) before I can make any real use
of the signal, but I want the input to the buffer to be as perfect as
possible.

Thanks :)


The waveform in a high Q tank that's lightly coupled to the amplifier
should be very nearly sinusoidal. If in addition, the amplifier
remains linear and represents a constant impedance over the whole
cycle of the waveform, then the waveforms should everywhere be
sinusoidal. If the amplifier+tank has barely enough loop gain to
sustain oscillation, then clipping will be minimal, but it's also
possible to detect the level and control the gain of the amplifier.
You could, for example, use a light bulb like HP did in their original
audio oscillator. Beware, though, that best oscillator performance in
other regards may not be achieved the same way you achieve lowest
harmonic distortion. Be careful that you optimize the right things
for your application.

In the work I do, I need to measure distortion, and the generators I
use don't have low enough distortion in their outputs to be directly
useful. The distortion levels in the "raw" outputs are generally
about -40 to -50dBc. I use filters to make things better, and can get
to -140dBc distortion levels fairly easily. If it's low harmonic
distortion you want, I'd suggest that it may be better to just put a
filter on the output of the oscillator that has only moderately low
harmonic output, and not worry so much about that aspect of oscillator
performance. Filters work well when the oscillator frequency range is
about 1.5:1 or less. Much more than that and you'd need to switch in
different filters depending on the oscillator frequency.

Cheers,
Tom
 
H

Helmut Sennewald

Jan 1, 1970
0
Hello Anthony,

1.
Please set the following option to sitch off data reduction/compression
in the result file..

..options plotwinsize=0

2.
You have to set a small maximum timestep in the .TRAN line too.
Maybe a value of 0.01*Period of oscillation if you hunt for very low
distortion.


Can you send me your file (.asc-file and model-file?) to check it?

Best regards,
Helmut
 
T

Tim Wescott

Jan 1, 1970
0
Anthony said:
Pictures available in ABSE

The top trace (yellow) is taken between C4 and R2. The bottom trace (cyan)
is taken at the base of the transistor. There is a switchercad file, but
the simulation will show allot of distortion that really isn't present in
the prototype circuit, because of lots of circuit capactance I suspect. R1
was something I was playing with to try and tame the voltage across L1/C3
being applied to the base.


Hello all,

I was tinkering with this LC oscillator (Colpitts/Clapp) this weekend. I
arrived at the values of C1 and C2 empirically after starting with a crystal
oscillator circuit. The values in the original circuit created a horrid
waveform that looked allot like the simulation. After much tinkering around
and simulating, I come to the conclusion that getting a perfect waveform is
nearly impossible, especially with big swing. It seems that the transistor
likes to take a bite out of the right half of the peak of the wave.

What is the secret to beautiful waveforms? Do I need another LC resonator
on the output to fix it up? I mean, I'm getting a pretty nice wave now, but
there is still some distortion that you can just see at the top of the peaks
on the yellow trace.

How do you control the peak voltages of an LC resonattor without mangling
the waveform? The waveform at the junction of L1/C3 is of course quite
beautiful, how do I get it from there to the output? ;-)

I realize that I will need a buffer stage(s) before I can make any real use
of the signal, but I want the input to the buffer to be as perfect as
possible.

Thanks :)
The secret to a beautiful waveform is -- you usually don't need it
straight from the oscillator.

There are a lot of things that you want out of an LC oscillator. Low
phase noise, frequency stability, consistently strong oscillation, pure
tone, etc. Of these, the only two that you can't clean up later in the
following amplifier chain is low phase noise and frequency stability.
Concentrate on those, & don't sweat the nice waveform.

Frequency stability and phase noise performance are often achieved by
intentionally designing the amplifier so the active element operates in
class C, without ever going into voltage saturation. This keeps it's
drain (or collector) impedance high, yet delivers a large voltage swing
to the gate (or base) to keep phase noise low. It also gives you a more
or less consistent standing voltage in the tank, which helps the design
of the following buffer stages.

If you absolutely positively must tap the World's Most Beautiful Sine
Wave off of the oscillator section, consider a parallel-tuned tank
that's loosely coupled to the active element. Then loosely couple your
output tap to that -- it's your best chance.

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

Posting from Google? See http://cfaj.freeshell.org/google/

"Applied Control Theory for Embedded Systems" came out in April.
See details at http://www.wescottdesign.com/actfes/actfes.html
 
A

Anthony Fremont

Jan 1, 1970
0
K7ITM said:
The waveform in a high Q tank that's lightly coupled to the amplifier
should be very nearly sinusoidal. If in addition, the amplifier
remains linear and represents a constant impedance over the whole
cycle of the waveform, then the waveforms should everywhere be
sinusoidal. If the amplifier+tank has barely enough loop gain to
sustain oscillation, then clipping will be minimal, but it's also
possible to detect the level and control the gain of the amplifier.
You could, for example, use a light bulb like HP did in their original
audio oscillator. Beware, though, that best oscillator performance in
other regards may not be achieved the same way you achieve lowest
harmonic distortion. Be careful that you optimize the right things
for your application.

After reading the other replies, it seems aparent that the shape of the
signal from the first stage is not that critical, it is stability and phase
noise that are most important. So, I should put things back where there is
clipping to be sure that the oscillator oscillates and then clean up the
signal in subsequent stages.
In the work I do, I need to measure distortion, and the generators I
use don't have low enough distortion in their outputs to be directly
useful. The distortion levels in the "raw" outputs are generally
about -40 to -50dBc. I use filters to make things better, and can get
to -140dBc distortion levels fairly easily. If it's low harmonic
distortion you want, I'd suggest that it may be better to just put a
filter on the output of the oscillator that has only moderately low
harmonic output, and not worry so much about that aspect of oscillator
performance. Filters work well when the oscillator frequency range is
about 1.5:1 or less. Much more than that and you'd need to switch in
different filters depending on the oscillator frequency.

Thanks. :)
 
A

Anthony Fremont

Jan 1, 1970
0
Helmut said:
Hello Anthony,

1.
Please set the following option to sitch off data
reduction/compression in the result file..

.options plotwinsize=0

2.
You have to set a small maximum timestep in the .TRAN line too.
Maybe a value of 0.01*Period of oscillation if you hunt for very low
distortion.


Can you send me your file (.asc-file and model-file?) to check it?

In alt.binaries.schematics.electronic I have posted the schematic, the
asc-file and an oscilloscope screen shot from an actual circuit. Here is
the asc-file contents:

Version 4
SHEET 1 880 708
WIRE -704 -96 -784 -96
WIRE -400 -96 -704 -96
WIRE -224 -96 -400 -96
WIRE -704 -16 -704 -96
WIRE -400 -16 -400 -96
WIRE -224 32 -224 -96
WIRE -544 80 -592 80
WIRE -400 80 -400 64
WIRE -400 80 -464 80
WIRE -288 80 -400 80
WIRE -592 128 -592 80
WIRE -400 144 -400 80
WIRE -784 160 -784 -96
WIRE -400 240 -400 208
WIRE -224 240 -224 128
WIRE -224 240 -400 240
WIRE -80 240 -224 240
WIRE 48 240 -16 240
WIRE -784 272 -784 240
WIRE -704 272 -704 48
WIRE -592 272 -592 208
WIRE -400 272 -400 240
WIRE -224 288 -224 240
WIRE -592 384 -592 336
WIRE -400 384 -400 336
WIRE -400 384 -592 384
WIRE -224 384 -224 368
WIRE -224 384 -400 384
WIRE -400 448 -400 384
FLAG -784 272 0
FLAG -400 448 0
FLAG -704 272 0
FLAG 48 320 0
SYMBOL voltage -784 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.8
SYMBOL res -416 -32 R0
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL npn -288 32 R0
SYMATTR InstName Q3
SYMATTR Value 2N3904
SYMBOL cap -416 144 R0
SYMATTR InstName C1
SYMATTR Value .01µ
SYMBOL res -240 272 R0
SYMATTR InstName R7
SYMATTR Value 1k
SYMBOL cap -416 272 R0
SYMATTR InstName C2
SYMATTR Value 500p
SYMBOL ind -608 112 R0
SYMATTR InstName L1
SYMATTR Value 20µ
SYMATTR SpiceLine Rser=.1
SYMBOL cap -608 272 R0
SYMATTR InstName C3
SYMATTR Value 200p
SYMBOL cap -16 224 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C4
SYMATTR Value 270p
SYMBOL res -448 64 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value .001
SYMBOL cap -720 -16 R0
SYMATTR InstName C5
SYMATTR Value 10µ
SYMBOL res 32 224 R0
SYMATTR InstName R2
SYMATTR Value 10000k
TEXT -792 360 Left 0 !.tran 50uS

Thank you for your time.
 
H

Helmut Sennewald

Jan 1, 1970
0
Anthony Fremont said:
In alt.binaries.schematics.electronic I have posted the schematic, the
asc-file and an oscilloscope screen shot from an actual circuit. Here is
the asc-file contents:


Hello Anthony,

The large capacitance of C1 (10nF) has caused an interrupted oscillation.
Please change its value to 1000p and the oscillator will work as expected.
I have also added MEASURE-commands to measure the frequency.
View -> SPICE Error Log

Another method is using the FFT in the waveform viewer.

Best regards,
Helmut

Save as "osc1.asc".

Version 4
SHEET 1 880 708
WIRE -688 -96 -784 -96
WIRE -576 -96 -688 -96
WIRE -304 -96 -576 -96
WIRE -784 -64 -784 -96
WIRE -688 -64 -688 -96
WIRE -576 -16 -576 -96
WIRE -304 32 -304 -96
WIRE -784 48 -784 16
WIRE -688 48 -688 0
WIRE -576 80 -576 64
WIRE -480 80 -576 80
WIRE -432 80 -480 80
WIRE -368 80 -432 80
WIRE -576 128 -576 80
WIRE -432 144 -432 80
WIRE -576 240 -576 208
WIRE -432 240 -432 208
WIRE -304 240 -304 128
WIRE -304 240 -432 240
WIRE -240 240 -304 240
WIRE -160 240 -240 240
WIRE -64 240 -96 240
WIRE -32 240 -64 240
WIRE -576 272 -576 240
WIRE -432 272 -432 240
WIRE -32 272 -32 240
WIRE -304 288 -304 240
WIRE -32 368 -32 352
WIRE -576 384 -576 336
WIRE -432 384 -432 336
WIRE -432 384 -576 384
WIRE -304 384 -304 368
WIRE -304 384 -432 384
WIRE -432 416 -432 384
FLAG -784 48 0
FLAG -432 416 0
FLAG -688 48 0
FLAG -32 368 0
FLAG -64 240 out
FLAG -240 240 e
FLAG -480 80 b
FLAG -576 240 lc
SYMBOL voltage -784 -80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.8
SYMBOL res -592 -32 R0
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL npn -368 32 R0
SYMATTR InstName Q3
SYMATTR Value 2N3904
SYMBOL cap -448 144 R0
SYMATTR InstName C1
SYMATTR Value 1000p
SYMBOL res -320 272 R0
SYMATTR InstName R7
SYMATTR Value 1k
SYMBOL cap -448 272 R0
SYMATTR InstName C2
SYMATTR Value 500p
SYMBOL ind -592 112 R0
WINDOW 39 36 108 Left 0
SYMATTR InstName L1
SYMATTR Value 20µ
SYMATTR SpiceLine Rser=.1
SYMBOL cap -592 272 R0
SYMATTR InstName C3
SYMATTR Value 200p
SYMBOL cap -96 224 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C4
SYMATTR Value 270p
SYMBOL cap -704 -64 R0
SYMATTR InstName C5
SYMATTR Value 10µ
SYMBOL res -48 256 R0
SYMATTR InstName R2
SYMATTR Value 100k
TEXT -824 -152 Left 0 !.tran 0 200uS 0 4n
TEXT -824 -184 Left 0 !.options plotwinsize=0
TEXT -816 472 Left 0 !.measure tran t1 FIND time WHEN V(out)=0 TD=90u RISE=1
TEXT -816 504 Left 0 !.measure tran t2 FIND time WHEN V(out)=0 TD=90u
RISE=101
TEXT -816 536 Left 0 !.measure tran f0 PARAM 100/(t2-t1)
TEXT -816 576 Left 0 ;View -> SPICE Error Log \nfor the measured frequency
TEXT -520 -184 Left 0 ;C1 changed to 1000p!
 
A

Anthony Fremont

Jan 1, 1970
0
Tim said:
The secret to a beautiful waveform is -- you usually don't need it
straight from the oscillator.
Okay..

There are a lot of things that you want out of an LC oscillator. Low
phase noise, frequency stability, consistently strong oscillation,
pure tone, etc. Of these, the only two that you can't clean up later
in the following amplifier chain is low phase noise and frequency
stability. Concentrate on those, & don't sweat the nice waveform.

Okay, that certainly explains why all the sample circuits I find don't
expend any great effort at creaing a nice sine wave, and none at explaining
why. What you say certainly makes sense, especially if there are no really
negative consequences of having the oscillator make a "less than perfectly
shaped" wave.
Frequency stability and phase noise performance are often achieved by
intentionally designing the amplifier so the active element operates
in class C, without ever going into voltage saturation. This keeps
it's drain (or collector) impedance high, yet delivers a large
voltage swing to the gate (or base) to keep phase noise low. It also
gives you a more or less consistent standing voltage in the tank,
which helps the design of the following buffer stages.

If you absolutely positively must tap the World's Most Beautiful Sine
Wave off of the oscillator section, consider a parallel-tuned tank
that's loosely coupled to the active element. Then loosely couple
your output tap to that -- it's your best chance.

Ok, thanks for the information. :) I did allot of googling but found
nothing that explained it like this. I was thinking of building a little
single conversion superhet WWV receiver for 10MHz, if I continue with that
I'll just concentrate on cleaning it up in another stage.

Some material I read suggested keeping Xl of L1 at ~300Ohms, the series Xc
(C3) at ~200Ohms and Xc of C1/C2 at 45Ohms. Do you have any thoughts on
that? Right now I have way too much inductance for 3.5MHz by that theory,
and judging from other circuits I've seen. <10uH seems to be the going thing
for around 4MHz?
 
T

Tam/WB2TT

Jan 1, 1970
0
Anthony Fremont said:
After reading the other replies, it seems aparent that the shape of the
signal from the first stage is not that critical, it is stability and
phase noise that are most important. So, I should put things back where
there is clipping to be sure that the oscillator oscillates and then clean
up the signal in subsequent stages.
I have never seen clipping. These things are supposed to limit in cutoff,
not saturation. As the signal build up, the conduction angle gets smaller
and smaller until the device runs out of gain. That is another way of saying
that the DC value of the gate voltage gets more negative the bigger the
amplitude. This works out automatically with a JFET. You need about 10K -
100K DC resistance from gate to ground. Using a bipolar transistor is not a
good idea.

Tam
 
T

Tim Wescott

Jan 1, 1970
0
Anthony said:
Tim Wescott wrote:




Okay, that certainly explains why all the sample circuits I find don't
expend any great effort at creaing a nice sine wave, and none at explaining
why. What you say certainly makes sense, especially if there are no really
negative consequences of having the oscillator make a "less than perfectly
shaped" wave.




Ok, thanks for the information. :) I did allot of googling but found
nothing that explained it like this. I was thinking of building a little
single conversion superhet WWV receiver for 10MHz, if I continue with that
I'll just concentrate on cleaning it up in another stage.

Some material I read suggested keeping Xl of L1 at ~300Ohms, the series Xc
(C3) at ~200Ohms and Xc of C1/C2 at 45Ohms. Do you have any thoughts on
that? Right now I have way too much inductance for 3.5MHz by that theory,
and judging from other circuits I've seen. <10uH seems to be the going thing
for around 4MHz?
That sounds more or less right. With a Clapp oscillator the main tank
is isolated by the series cap, so more of the energy is kept in the coil
and C3, and less of it shows up in C1, C2, and the transistor.

If you're driving a balanced mixer you want to have an LO signal that
doesn't have much even-harmonic (2nd, 4th, etc.) energy in it, but for a
casual receiver that's the least of your worries. Since you're
operating at a fixed frequency it may be a good idea to just feed the
oscillator output into a single-tuned resonant circuit to clean it up,
then send it on to the mixer.

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

Posting from Google? See http://cfaj.freeshell.org/google/

"Applied Control Theory for Embedded Systems" came out in April.
See details at http://www.wescottdesign.com/actfes/actfes.html
 
A

Anthony Fremont

Jan 1, 1970
0
Tam/WB2TT said:
"Anthony Fremont" <[email protected]> wrote in message
I have never seen clipping. These things are supposed to limit in
cutoff, not saturation. As the signal build up, the conduction angle
gets smaller and smaller until the device runs out of gain. That is
another way of saying that the DC value of the gate voltage gets more
negative the bigger the amplitude. This works out automatically with
a JFET. You need about 10K - 100K DC resistance from gate to ground.
Using a bipolar transistor is not a good idea.

I was wondering about the load that a bipolar would present. I will see if
I can find a JFET in my junk pile, thank you. :)
 
C

Chris Jones

Jan 1, 1970
0
Anthony said:
Pictures available in ABSE

The top trace (yellow) is taken between C4 and R2. The bottom trace
(cyan)
is taken at the base of the transistor. There is a switchercad file, but
the simulation will show allot of distortion that really isn't present in
the prototype circuit, because of lots of circuit capactance I suspect.
R1 was something I was playing with to try and tame the voltage across
L1/C3 being applied to the base.


Hello all,

I was tinkering with this LC oscillator (Colpitts/Clapp) this weekend. I
arrived at the values of C1 and C2 empirically after starting with a
crystal
oscillator circuit. The values in the original circuit created a horrid
waveform that looked allot like the simulation. After much tinkering
around and simulating, I come to the conclusion that getting a perfect
waveform is
nearly impossible, especially with big swing. It seems that the
transistor likes to take a bite out of the right half of the peak of the
wave.

What is the secret to beautiful waveforms? Do I need another LC resonator
on the output to fix it up? I mean, I'm getting a pretty nice wave now,
but there is still some distortion that you can just see at the top of the
peaks on the yellow trace.

How do you control the peak voltages of an LC resonattor without mangling
the waveform? The waveform at the junction of L1/C3 is of course quite
beautiful, how do I get it from there to the output? ;-)

I realize that I will need a buffer stage(s) before I can make any real
use of the signal, but I want the input to the buffer to be as perfect as
possible.

Thanks :)

In some LC oscillators, the amplitude of the oscillation is controlled by a
feedback loop. For example, a rectifier can be used to create a DC voltage
proportional to the oscillation amplitude on the LC tank, and then an
op-amp can be used to compare the rectifier output signal to a reference
voltage. The output from the op-amp can be filtered and then used to
control the current in the oscillator core. It is difficult to do all of
this in a way that keeps the phase noise low, but given the right
simulation tools (e.g. SpectreRF which is rather expensive), good results
can be obtained. In particular, a well-defined oscillation amplitude can
help to keep the KVCO well controlled, which is useful in PLLs.

Chris
 
C

colin

Jan 1, 1970
0
Chris Jones said:
In some LC oscillators, the amplitude of the oscillation is controlled by
a
feedback loop. For example, a rectifier can be used to create a DC
voltage
proportional to the oscillation amplitude on the LC tank, and then an
op-amp can be used to compare the rectifier output signal to a reference
voltage. The output from the op-amp can be filtered and then used to
control the current in the oscillator core. It is difficult to do all of
this in a way that keeps the phase noise low, but given the right
simulation tools (e.g. SpectreRF which is rather expensive), good results
can be obtained. In particular, a well-defined oscillation amplitude can
help to keep the KVCO well controlled, which is useful in PLLs.

Chris

This can more difficult to acheive well than it first seems,
adjusting the bias conditions to adjust level is often not stable,
as it draws more current as the oscilations build up,
a fast feedback loop wich monitors the current can be used to adjust the
bias to
keep the average current at a set point,
wich can be just a single npn transistor,
an op amp can then be used to set the set point,
although just ensuring a set current is usually sufficient to maintain a
very clean stable waveform,
and yet not have any startup problems,
for all but very wide range oscillators.

Colin =^.^=
 
A

Anthony Fremont

Jan 1, 1970
0
Helmut said:
Hello Anthony,

The large capacitance of C1 (10nF) has caused an interrupted
oscillation. Please change its value to 1000p and the oscillator will
work as expected. I have also added MEASURE-commands to measure the
frequency. View -> SPICE Error Log

Another method is using the FFT in the waveform viewer.

Best regards,
Helmut

Save as "osc1.asc".

Version 4
SHEET 1 880 708
WIRE -688 -96 -784 -96
WIRE -576 -96 -688 -96
WIRE -304 -96 -576 -96
WIRE -784 -64 -784 -96
WIRE -688 -64 -688 -96
WIRE -576 -16 -576 -96
WIRE -304 32 -304 -96
WIRE -784 48 -784 16
WIRE -688 48 -688 0
WIRE -576 80 -576 64
WIRE -480 80 -576 80
WIRE -432 80 -480 80
WIRE -368 80 -432 80
WIRE -576 128 -576 80
WIRE -432 144 -432 80
WIRE -576 240 -576 208
WIRE -432 240 -432 208
WIRE -304 240 -304 128
WIRE -304 240 -432 240
WIRE -240 240 -304 240
WIRE -160 240 -240 240
WIRE -64 240 -96 240
WIRE -32 240 -64 240
WIRE -576 272 -576 240
WIRE -432 272 -432 240
WIRE -32 272 -32 240
WIRE -304 288 -304 240
WIRE -32 368 -32 352
WIRE -576 384 -576 336
WIRE -432 384 -432 336
WIRE -432 384 -576 384
WIRE -304 384 -304 368
WIRE -304 384 -432 384
WIRE -432 416 -432 384
FLAG -784 48 0
FLAG -432 416 0
FLAG -688 48 0
FLAG -32 368 0
FLAG -64 240 out
FLAG -240 240 e
FLAG -480 80 b
FLAG -576 240 lc
SYMBOL voltage -784 -80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.8
SYMBOL res -592 -32 R0
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL npn -368 32 R0
SYMATTR InstName Q3
SYMATTR Value 2N3904
SYMBOL cap -448 144 R0
SYMATTR InstName C1
SYMATTR Value 1000p
SYMBOL res -320 272 R0
SYMATTR InstName R7
SYMATTR Value 1k
SYMBOL cap -448 272 R0
SYMATTR InstName C2
SYMATTR Value 500p
SYMBOL ind -592 112 R0
WINDOW 39 36 108 Left 0
SYMATTR InstName L1
SYMATTR Value 20µ
SYMATTR SpiceLine Rser=.1
SYMBOL cap -592 272 R0
SYMATTR InstName C3
SYMATTR Value 200p
SYMBOL cap -96 224 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C4
SYMATTR Value 270p
SYMBOL cap -704 -64 R0
SYMATTR InstName C5
SYMATTR Value 10µ
SYMBOL res -48 256 R0
SYMATTR InstName R2
SYMATTR Value 100k
TEXT -824 -152 Left 0 !.tran 0 200uS 0 4n
TEXT -824 -184 Left 0 !.options plotwinsize=0
TEXT -816 472 Left 0 !.measure tran t1 FIND time WHEN V(out)=0 TD=90u
RISE=1 TEXT -816 504 Left 0 !.measure tran t2 FIND time WHEN V(out)=0
TD=90u RISE=101
TEXT -816 536 Left 0 !.measure tran f0 PARAM 100/(t2-t1)
TEXT -816 576 Left 0 ;View -> SPICE Error Log \nfor the measured
frequency TEXT -520 -184 Left 0 ;C1 changed to 1000p!

Thank you very much. :) I have now switched to using an MPF102 JFET
instead of the bipolar and much less capacitance for C1 (now 470pF). I only
get a 2V peak to peak signal out now, but it's quite nice looking.
 
A

Anthony Fremont

Jan 1, 1970
0
Tim said:
Anthony Fremont wrote:
That sounds more or less right. With a Clapp oscillator the main tank
is isolated by the series cap, so more of the energy is kept in the
coil and C3, and less of it shows up in C1, C2, and the transistor.

If you're driving a balanced mixer you want to have an LO signal that
doesn't have much even-harmonic (2nd, 4th, etc.) energy in it, but
for a casual receiver that's the least of your worries. Since you're
operating at a fixed frequency it may be a good idea to just feed the
oscillator output into a single-tuned resonant circuit to clean it up,
then send it on to the mixer.

Ok, I've now put in an MPF102 and changed R3 to a pull-down. I lowered C1
to 470pF and I get a nifty 2V p-p sine wave on the output. It really tamed
the tank circuit voltage down as well. Which brings up a question, with the
tank now completely DC blocked from Vcc and Vss, where does it get it's
energy. I assume that it must come thru the gate. How does that happen?
:-? My circuit is much like Figure 1 here, without the diode though:
http://www.electronics-tutorials.com/oscillators/clapp-oscillators.htm
 
J

john jardine

Jan 1, 1970
0
Anthony Fremont said:
Pictures available in ABSE

The top trace (yellow) is taken between C4 and R2. The bottom trace (cyan)
is taken at the base of the transistor. There is a switchercad file, but
the simulation will show allot of distortion that really isn't present in
the prototype circuit, because of lots of circuit capactance I suspect. R1
was something I was playing with to try and tame the voltage across L1/C3
being applied to the base.


Hello all,

I was tinkering with this LC oscillator (Colpitts/Clapp) this weekend. I
arrived at the values of C1 and C2 empirically after starting with a crystal
oscillator circuit. The values in the original circuit created a horrid
waveform that looked allot like the simulation. After much tinkering around
and simulating, I come to the conclusion that getting a perfect waveform is
nearly impossible, especially with big swing. It seems that the transistor
likes to take a bite out of the right half of the peak of the wave.

What is the secret to beautiful waveforms? Do I need another LC resonator
on the output to fix it up? I mean, I'm getting a pretty nice wave now, but
there is still some distortion that you can just see at the top of the peaks
on the yellow trace.

How do you control the peak voltages of an LC resonattor without mangling
the waveform? The waveform at the junction of L1/C3 is of course quite
beautiful, how do I get it from there to the output? ;-)

I realize that I will need a buffer stage(s) before I can make any real use
of the signal, but I want the input to the buffer to be as perfect as
possible.

Thanks :)
The prettiest waveforms come from balanced oscillators. Distortion then
turns up as 3rd 5th 7th etc harmonics which are far less ugly than the 2nd
3rd 4th 5th etc generated by the single ended types. Balanced ALC is also
easier and more effective.
My own experience says that 'prettier' is better. Those oscillators offering
gross distorted outputs also seem to suffer badly in other areas and gross
distortion always causes problems further down the line.
Procuring good quality is a classic black art, one aspect is to allow the
LC just an occasional vague glimpse of the maintaining amplifier. Another is
to cause limiting by use of an amp having a gentle gain change (eg Fet v
bipolar) and the other is ALC. (Or all three together).
Failing that, there is always the cop-out of an output filter :)
john
 
T

Tim Wescott

Jan 1, 1970
0
Anthony said:
Ok, I've now put in an MPF102 and changed R3 to a pull-down. I lowered C1
to 470pF and I get a nifty 2V p-p sine wave on the output. It really tamed
the tank circuit voltage down as well. Which brings up a question, with the
tank now completely DC blocked from Vcc and Vss, where does it get it's
energy. I assume that it must come thru the gate. How does that happen?
:-? My circuit is much like Figure 1 here, without the diode though:
http://www.electronics-tutorials.com/oscillators/clapp-oscillators.htm
It comes from the source, through the coupling capacitors -- Cfb-a and
Cfb-b in your link.

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

Posting from Google? See http://cfaj.freeshell.org/google/

"Applied Control Theory for Embedded Systems" came out in April.
See details at http://www.wescottdesign.com/actfes/actfes.html
 
A

Anthony Fremont

Jan 1, 1970
0
Tam/WB2TT said:
I have never seen clipping. These things are supposed to limit in
cutoff, not saturation. As the signal build up, the conduction angle
gets smaller and smaller until the device runs out of gain. That is
another way of saying that the DC value of the gate voltage gets more
negative the bigger the amplitude. This works out automatically with
a JFET. You need about 10K - 100K DC resistance from gate to ground.
Using a bipolar transistor is not a good idea.

I have now changed it to an MPF102 that I've had laying around for many
years. It works great, thanks.
:)
 
T

Tam/WB2TT

Jan 1, 1970
0
Anthony Fremont said:
I have now changed it to an MPF102 that I've had laying around for many
years. It works great, thanks.
:)
Glad it worked out. By the way the feedback path is through the capacitive
network between source and gate. That would be more obvious in the
configuration that uses a tapped inductor, but works the same way. Leaving
out the diode was the right thing to do; it just adds to the noise. I don't
know what kind of stability and linearity you need, but if that is
important, do not use the common type of ceramic capacitors that are meant
for bypassing. They are lossy, and their value varies with applied voltage.
Use mica, NPO ceramic, or Mylar and similar for larger values.

Tam
 
R

rebel

Jan 1, 1970
0
I was wondering about the load that a bipolar would present. I will see if
I can find a JFET in my junk pile, thank you. :)

Without going to the purity levels that Tom requires, I've always found that
bipolars can be used to produce a fairly reasonable "visibly sinusoidal" (see
note) waveform. Follow the oscillator with an amplifier stage which drives a
limiter/clipper, and use that to control a gain element in the oscillator. It's
like the incandescent non-linearity arrangement except the oscillator stage
waveform remains fairly clean.

(Note: Harmonic distortion not readily discernible on a CRO)
 
Top