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Job-CO-Circuit Design Engineer

Discussion in 'Electronic Design' started by TekRecruiter, Aug 23, 2005.

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  1. TekRecruiter

    TekRecruiter Guest

    Circuit Design Engineer

    Location: Longmont, Colorado
    Pay Rate: $75-100/hr (W-2 only please, no 1099 or corp-to-corp)
    Duration: Long-term contract (possible to hire opportunity if one was
    interested)

    Responsibilities:
    Insure electrical and timing performance of DDR2 interface operating at
    533MT/s .

    Create a pre-silicon model of DDR2 interface including:

    Clocking from clock tree on die
    Pad enable and control signals (including ODT)
    Power distribution on die, package and PCB
    Bypass capacitance on die, package and PCB
    Spice model of I/O design
    Spice model of package for signals and power
    Spice model of board topology
    Model of DIMM including actual I/O cell model of DDR2 device.
    SSO/SSN effects

    Consult with I/O design engineers, board engineers, and silicon logic
    design engineers to provide optimal margining of DDR2 533MT/s.

    Develop timing analysis of DDR2 bus.

    Provide PCB routing constraints.

    Create plan to validate DDR2 electrical operation=20.

    Perform measurements to verify functionality of DDR2 interface on PCB.

    Model existing DDR I/O design behavior and correlate observed lab
    results.

    Qualifications:
    A technology related Bachelor's degree or equivalent combination of
    training and experience plus 7 years of related experience. A Master's
    degree plus 5 years of related experience or a doctorate degree is
    preferred.

    My client manager tells me he really needs a Signal Integrity Engineer
    with strong DDR interface analysis skills.

    Please send resumes/inquiries to Stacey Reyes,

    Boulder, Co
    888-470-5952
     
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