Isolated variable resistor function?

[[email protected]]

[email protected] wrote:

[...]

As long as the processor is already there, tell them to stop whining. It's a
SMOP and takes no resources. Even the validation is a piece of cake.

Wot's a SMOP?

Simple Matter of Programming. From the IBMJARG file:

SMOP
n. Something quite possible, but requiring unavailable resources to
achieve.
"Why isn't that function available in the program?--It's just a Simple
Matter Of Programming". (The implication being that, given a few
person-centuries, all things are possible.)
Also _SMOUP_ (smoop), a Simple Matter Of Micro-Programming (if
hand-written, using a Greek mu).

Thanks. I learn something new every day

The "takes no resources" part is not true. Every ever so tiny project

I meant hardware resources. If it's only done on power-on, it doesn't count.
;-)

needs to be managed, reviewed, documented, regression-tested,
ECO-released, and on and on.

That's covered by "Even the validation is a piece of cake.". Since it only
occurs on power-on, the complexity of interactions with other processes goes
*way* down.

Changing the thread diameter of a screw can
easily cause many manhours of extra work.

Sure, but that's hardware. ;-)

 

[[email protected]]

Phil Hobbs wrote:
Joerg wrote:
[email protected] wrote:
[...]

As long as the processor is already there, tell them to stop whining. It's a
SMOP and takes no resources. Even the validation is a piece of cake.

Wot's a SMOP?

--
Regards, Joerg

http://www.analogconsultants.com/
Simple Matter of Programming. From the IBMJARG file:

SMOP
n. Something quite possible, but requiring unavailable resources to
achieve.
"Why isn't that function available in the program?--It's just a Simple
Matter Of Programming". (The implication being that, given a few
person-centuries, all things are possible.)
Also _SMOUP_ (smoop), a Simple Matter Of Micro-Programming (if
hand-written, using a Greek mu).

Thanks. I learn something new every day

The "takes no resources" part is not true. Every ever so tiny project
needs to be managed, reviewed, documented, regression-tested,
ECO-released, and on and on. Changing the thread diameter of a screw can
easily cause many manhours of extra work.

"Takes unavailable resources" means "takes resources that are not
available", i.e. you and IBMJARG are in violent agreement.

I meant what Keith wrote

See above.

As for unavailable resources, our drill sergeant had a solution for
that. Sometimes he hollered "The day has 24 hours and if that's not
enough there's still the night!"

In a department meeting once, my manager said that he had "good news and bad
news". "The good news was that everyone will be working half-days from now
on." "Now the bad news, there are 24 hours in a day." He wasn't kidding but
I'd already been working 12x6-1/2 for months by that time and I only had a few
months to go. ;-)

 

[Jon Kirwan]

<snip>
If that's like what they were doing on their 28F3xx DSP parts several
years ago, it's a regular ol' PWM followed by a variable time delay.
<snip>

I see this quote from TI: "the TMS320F280x devices offer a TI
proprietary high-resolution PWM mode that provides
approximately 6 additional bits of resolution beyond the
standard time-base resolution..."

Is that what you meant?

Jon

 

[Joerg]

Jim Thompson wrote:
John Larkin wrote:
[snip]
Any chance you can PWM a resistor?

Would be nice but the part where the resulting signal goes into is
blazingly fast (has to be). So the PWM would cause an undesired modulation.

But it is an idea, maybe I can slow something down in there. And go in
with several meggeehoitzes. The uC we have would moan and groan though.
Please define "blazingly fast"?

In this case several MHz. In the world of switch mode power supplies
that counts as "blazingly fast"
Is current flow in the resistor unidirectional... doesn't pass thru
zero?

Yes, unidirectional. Goes to zero at times but never crosses onto
negative turf.

Says some simplistic single-quadrant multiplier might work. Still
interested? Or is problem already "solved"?

Well, I am likely going to use the digital potmeter. 30c is hard to
beat. I just thought that maybe someome knows an analog miracle
optocoupler that can comply with 1V excitation. That would have reduced
a 2-chip solution to 1-chip.

Simulating some control stuff for it right now. But, the Weber is
heating up so in a few minutes there will be a scent of barbecued beef
ribs wafting through the neighborhood. Followed by a shotglass of
Forsthaeusler that I brought back from Germany on Thursday. 80-proof but
smooth as can be:

http://forsthaeusler.de/

Couldn't believe it, there is next to no burning sensation on the way
down. This stuff is great.

 

[Allan Herriman]

Well, as I pointed to before, take a look at Figure 19-2 in the Family
User's Guide, found following from here:

http://www.ti.com/product/msp430f5172&DCMP=msp430&HQS=430timer

It is behaviorally diagrammed as a fast clock generator followed by your
basic /1 /2 /4 /8 divider. It picks off of the IDEX divider against the
regular clock sources, so on that level it looks like a normal
multiplier. It includes an "in-lock" bit, TDHLKIFG, to inform you when
lock is achieved.

It also runs completely free. No lock, no care about another oscillator,
at all. So all that makes me think they actually have a fast internal
DCO of some kind, but where it can optionally be locked to a lower speed
crystal source.

Some words may relate to what you were saying, Tim. I see this:

In regulated mode, the high-resolution generator produces 8 or 16
equidistant events per timer input clock cycle. Regulation is enabled
by setting the high-resolution calibration enable bit TDHREGEN.
The high-resolution generator tracks changes of the timer input clock
after locking to the timer input clock frequency. Locking is indicated
by setting the lock interrupt flag TDHLKIFG. As long as the high-
resolution generator is not locked, the interrupt flag TDHUNLKIFG is
set.

If the timer input clock is out of the frequency range of the
high-resolution generator, then the fail-high interrupt flag (TDHFHIFG)
or the fail- low interrupt flag (TDHFLIFG) is set.

If the TDHREGEN bit is cleared, the continuous regulation is stopped
and the high-resolution frequency enters free-running mode. The latest
settings are kept.

There is no datasheet yet and so I can't look at related specs that
might help elucidate any better. I assumed that they folded in Nat Semi
technology (they are doing this with their work on FRAM, too) to reach
256MHz in their process.

It's a little odd on the MSP430, as it goes upstream of their "extremely
low power" selling point (valid and well-made.) If they were doing this
and keeping most of the high clock rate stuff tightly contained in small
region of the die, perhaps it would still be 'congruent.' But they use
it to drive an entire timer counter and this also means fast compare
logic, as well. So it starts to look like more die space is involved
than less and I have to imagine current draw will be unusually high
then.

Still, it is another selling point corner, I suppose.

This part: "In regulated mode, the high-resolution generator produces 8
or 16 equidistant events per timer input clock cycle" means what it says.

It should not be construed as meaning there's a 256MHz clock anywhere: 16
phases of a 16MHz clock is not the same as a 256MHz clock.

Regards,
Allan

 

[John Devereux]

This part: "In regulated mode, the high-resolution generator produces 8
or 16 equidistant events per timer input clock cycle" means what it says.

It should not be construed as meaning there's a 256MHz clock anywhere: 16
phases of a 16MHz clock is not the same as a 256MHz clock.

But there could well be - in modern microcontrollers there is often a
clock up around there, due to the way a standard crystal frequency is
multiplied up by a PLL then divided down again to get the specific
clocks required.

 

[Fred Abse]

I drink Drambuie ;-)

Somebody had to ;-)

 

[Charlie E.]

Well, since I am not going to use one from M.... I think I am stuck with
the MCP series or I2C stuff. The MCPs only have up/down command so you
can't command them to go to a particular position. But that's ok, I can
let the uC quickly peg it and go from there. It's just that this method
is, how shall I say, a bit pedestrian.

What is wrong with the I2C guys? You still have to use two wires for
commands but now you can set to a specific value. Or, is there some
other reason for using the up/down protocol?

Charlie

 

[Joerg]

What is wrong with the I2C guys? You still have to use two wires for
commands but now you can set to a specific value. Or, is there some
other reason for using the up/down protocol?

My experience with I2C is quite mixed. Sometimes there were undocumented
hang-up modes. I'd rather use SPI, it is more robust.

 

[Joerg]

If you're sneaky, you can push SPI through two optos, or even one.

Two is easy but most of the time when I proposed a bi- or tri-level
scheme my clients said it's too much of a white-knuckle thing. So I
often used carriers instead.

 

[Bill Sloman]

I was thinking of pulse widths, not levels. I came up with a scheme
that use an HC123 and an RC, or something like that. I could try to
reproduce it if anybody was interested.

Isn't that Manchester 2? The telecom companies went in for more
elaborate schemes with even lower low frequency content - nowadays
they seem to be back to telephone modem style phase and amplitude
modulation, but there was a time when ADSL used fairly simple
encoding.

 

[Joerg]

I was thinking of pulse widths, not levels. I came up with a scheme
that use an HC123 and an RC, or something like that. I could try to
reproduce it if anybody was interested.

But then I'd need yet another IC, a HC123. Maybe I should plop in a 555
in Hans Camenzind's memory. Now I almost feel guilty for not ever having
designed in one of those.

 

[[email protected]]

My experience with I2C is quite mixed. Sometimes there were undocumented
hang-up modes. I'd rather use SPI, it is more robust.

I would too, but right now I'm using (several of) both because of the number
of devices and some only come in one flavor. The problem with SPI standard is
that it isn't one. We almost always end up bit-banging the interface because
of some defugalty. Even so, I've had fewer problems with it.

 

[Joerg]

There is a TinyLOgic HC123.

Dual optocouplers aren't much more expensive than singles. I think you
can use one side for clock and data, and the other for CS*. Just one
RC on the receive side can separate zeroes (short pulses) from 1s
(longer ones.)

I wouldn't even need CS because there is only one resistance to be
controlled. I think the digital potmeter works best. Two-channel
optocoupler, the digital potmeter, done. Ok, plus a resistor and zener
to supply it.

 

[Joerg]

I would too, but right now I'm using (several of) both because of the number
of devices and some only come in one flavor. The problem with SPI standard is
that it isn't one. We almost always end up bit-banging the interface because
of some defugalty. Even so, I've had fewer problems with it.

^^^^^^^^^^

Hah! I learned a new word today. Thanks.

What I found to be of cast-iron performance is RS485 and CAN but very
few devices useful for my stuff come with that.

 

[Joerg]

What, use the tick-tock up/down control thing?

Too easy, not fair.

Yeah, I know, it's too pedestrian

 

[josephkk]

There are various schemes to try to make English a strongly inflected
language, and they're all doomed. Importing Latin case names doesn't
make it so.

Cheers

Phil Hobbs

English is well related to German and there is a dative case there as
well. English and German also have genitive and reflexive cases.

Enjoy.

?-)

 

[Bill Sloman]

English is well related to German and there is a dative case there as
well.  English and German also have genitive and reflexive cases.

Enjoy.

English and German do have a common ancestor around 1100 years ago,
but English has eliminated a few complexities that German retains.

 

[Bill Sloman]

My idea used long and short pulses for 1s and 0s. The pulse was both
data and clock. A simple RC on the receive end separated them back
out. One one-shot made CS* too. Something like that.

And that's basically Manchester 2 encoding.

http://en.wikipedia.org/wiki/Manchester_code

The original publication - IIRR somebody's thesis - listed a whole
series of variations on this basic idea. Manchester 2 was the most
popular.

 

[Jasen Betts]

This part: "In regulated mode, the high-resolution generator produces 8
or 16 equidistant events per timer input clock cycle" means what it says.

It should not be construed as meaning there's a 256MHz clock anywhere: 16
phases of a 16MHz clock is not the same as a 256MHz clock.

I don't see how they can be equidistant and not at 256Mhz