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IC 555

vick5821

Jan 22, 2012
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Hey guys, recently I have played around with IC 555 and I came across the astable, monostable and bistable state of the operation of the IC.However, I can't differentiate between these 3 mode of the operation of IC..Can anyone explain to me ? and I am confused abt the pin function for pin 2,6 and 7. I do not understand the explanation given.Can anyone help me ? As I know IC 555 is basic in electronic engineering right ?

Thank you.


Regards,
V
 

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OK, do you know what astable, monostable, and bistable mean? (and do you realise that the output of a 555 is in one of 2 possible states?)
 

vick5821

Jan 22, 2012
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OK, do you know what astable, monostable, and bistable mean? (and do you realise that the output of a 555 is in one of 2 possible states?)

Theoretically, I know what is meant by monostable, astable or bistable.However I am not really what is meant by that..

Yes, the output can be in stable or unstable state.This is what I know :)
 

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OK, the first thing is that the output can be either high or low -- 2 states (neither, either, or both of these states may be "unstable").

Astable means the output does not remain in either state. It toggles all by itself from one to the other and back again. high, low, high, low, high, low...

Monostable means that it is stable in one state (it can be either high or low). When in the stable state it will remain there permanently, unless it is triggered to go into the other state. Once in the other state it will (after an interval) revert back to the stable state. So it could be stable low... (forever until)Trigger -> high, low... (forever until) trigger -> high, low...

Bistable means that it is stable in both states. The device will stay in the state it is put into and not change until it is told to. Low (forever until) Set -> High... (forever until) Reset -> low... (forever until) set.

Note

(1) an astable circuit has no trigger, it oscillaes back and forth all by itself

(2) a monostable has a single trigger that will push the device into the "unstable" state (say, high), from which it will fall back to the "stable" state (say, low).

(3) a bistable has 2 triggers, one will push the output high, the other low. Without inputs on the trigger inputs, the state will not change.
 

vick5821

Jan 22, 2012
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OK, the first thing is that the output can be either high or low -- 2 states (neither, either, or both of these states may be "unstable").

Astable means the output does not remain in either state. It toggles all by itself from one to the other and back again. high, low, high, low, high, low...

Monostable means that it is stable in one state (it can be either high or low). When in the stable state it will remain there permanently, unless it is triggered to go into the other state. Once in the other state it will (after an interval) revert back to the stable state. So it could be stable low... (forever until)Trigger -> high, low... (forever until) trigger -> high, low...

Bistable means that it is stable in both states. The device will stay in the state it is put into and not change until it is told to. Low (forever until) Set -> High... (forever until) Reset -> low... (forever until) set.

Note

(1) an astable circuit has no trigger, it oscillaes back and forth all by itself

(2) a monostable has a single trigger that will push the device into the "unstable" state (say, high), from which it will fall back to the "stable" state (say, low).

(3) a bistable has 2 triggers, one will push the output high, the other low. Without inputs on the trigger inputs, the state will not change.

Oh..I think I get it!

Monostable : We use a push switch in the operation. When we power up the circuit, it will be in the stable state[high](For eg the LED will be light up).When we trigger the switch, the LED will change from high to low.So it will be turned off once the switch is pressed.

Astable : From your explanation , it can be seen that it is juts like a flashing LED circuit where the state of the LED will oscillate between high and low automatically without any trigger.

Bistable : For this circuit, It is necessary to use 2 switches in the operation.For example, we have two LED(green and red), So, if I press switch 1, red LED will be on(high) and if I presses switch2, the green LED will be on(high) and the red will be low.So, as a conclusion, for bistable circuit, the high/low state is being controlled by switches.

Am I correct ? Did I get the correct things? Correct me if I am wrong

Thank you!
 

jackorocko

Apr 4, 2010
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Monostable: Correct, but you need to add that the LED will come back on after a certain amount of time. It will only change state when triggered, but it will remain in that new triggered state for only a time period set by you, the designer. Then it will go back to the original state. Ready for a re-trigger.
 

vick5821

Jan 22, 2012
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Monostable: Correct, but you need to add that the LED will come back on after a certain amount of time. It will only change state when triggered, but it will remain in that new triggered state for only a time period set by you, the designer. Then it will go back to the original state. Ready for a re-trigger.

Oh, so it means that I triggered the LED, it will become HIGH...and it will become LOW automaticall after some period of time ?

For bistable, I triggered the LED, it will become HIGH and it wont become low automatically until I triggered it to become LOW ?

Am I correct now ?

Thank you
 

vick5821

Jan 22, 2012
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Monostable: Correct, but you need to add that the LED will come back on after a certain amount of time. It will only change state when triggered, but it will remain in that new triggered state for only a time period set by you, the designer. Then it will go back to the original state. Ready for a re-trigger.

what does it means by Trigger(pin 2) makes the output high.Trigger is 'active low', it functions when < 1/3Vs
Reset (pin 4) makes the output low.Reset is 'active low' , it resets when <0.7V

What does these two statements mean ? Under bistable

And just to ask, what is the input pins for IC 555 ? I just know that pin 3 is the output pins and is connected to external components.

Thank you
 

jackorocko

Apr 4, 2010
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active low - means in this instance that it requires a low signal for that pin to effect the output. A low signal on Pin 2 turns the output 'HIGH' and low signal on Pin 4 changes the output to a 'LOW' signal. It is explaining to you how to make the output of the 555 change states.
 
Last edited:

vick5821

Jan 22, 2012
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active low - means in this instance that it requires a low signal for that pin to effect the output. A low signal on Pin 2 turns the output 'HIGH' and low signal on Pin 4 changes the output to a 'LOW' signal. It is explaining to you how to make the output of the 555 change states.

What cases it to have low signal ? When the voltage is <1/3Vs ?? So it is low ?
 

vick5821

Jan 22, 2012
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active low - means in this instance that it requires a low signal for that pin to effect the output. A low signal on Pin 2 turns the output 'HIGH' and low signal on Pin 4 changes the output to a 'LOW' signal. It is explaining to you how to make the output of the 555 change states.

why a low signal in pin 2 will cause a high in output pin ? does low signal means it is not being triggered ?
 

jackorocko

Apr 4, 2010
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why a low signal in pin 2 will cause a high in output pin ? does low signal means it is not being triggered ?

The internal circuitry of the 555 sets this. You will need to understand how a 555 works if you really want to know. There is a flip-flop inside the 555 and when triggered it just switches states. http://www.unitechelectronics.com/NE-555.htm#NE555-trigger

What causes it to have low signal ? When the voltage is <1/3Vs ?? So it is low ?

Yes, <1/3 (less then 1/3) of the input voltage is considered a 'LOW' signal. It doesn't have to be zero, just below 1/3 Vs
 
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BobK

Jan 5, 2010
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why a low signal in pin 2 will cause a high in output pin ? does low signal means it is not being triggered ?
That is what "active low" means. The trigger input is activated when the signal is low.

Bob
 

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Inverted logic is the one thing that gives people the most trouble.

You are pretty much conditioned to think 0v = low = off and Vcc = high = on.

This works for all the standard gates and logic because they are "positive logic"

However, occasionally (well, more than occasionally) the designer will decide that rather than the signal required to activate something being a high signal, it will be a low signal.

This inverted (or negative) logic kinda means that to turn something on, you have to turn it's input off.

So why would this be done?

Look at the most common use of a 555, as a astable oscillator. Essentially a capacitor is charged until it gets to about 2/3 Vcc at which time the voltage across the capacitor is detected by the 555 as a signal to start discharging.

This is positive logic, active high, and triggers (internally) a bistable to change state. This is pin 6, an input -- threshold. It is related to pin 5 (control), but this later pin is typically left either disconnected or connected to ground by a capacitor. Pin 6 is connected to the timing capacitor.

The capacitor is discharged via the discharge pin (7). This is an output which is effectively switched to ground by the flip flop (that has been triggered by pin 6 going above 2/3 Vcc. Typically this is also connected to the capacitor, but via a resistor to limit the discharge current, but also to provide a known discharge rate. To add a little confusion, this pin is also normally connected to Vcc via a resistor which is the charging route for the timing capacitor. Note that pin 7 (an output) is active low. When it's doing its discharge think it is pulled to ground.

Pin 2 (trigger) is an active low input. A trigger event happens when the voltage on this pin falls below 1/3 Vcc. As far as triggering is concerned, high is off (untriggered) and low is ON (triggered). This matches the discharge pin's inverted logic. It matches it for a very good reason. The discharge pin, when low will be discharging the timing capacitor. Pin 2 is also connected to the capacitor (pins 2 and 6 are typically connected together so that they sample the same voltage). As this drops to below 1/3 Vcc, this is activated, and it changes the state of the internal flip flop. This turns off the discharge pin (7), and the capacitor can start to charge again.

Things happen a little differently when wired as a monostable or bistable, but the same inverted logic exists on some pins because they are designed to detect a voltage falling through a particular level vs the positive logic which is there to detect a voltage rising through a particular level.

In digital circuits (the 555 is a bit of an analog/digital hybrid) inverted vs normal logic can be used to detect falling vs rising edges (we call a transition from low to high a rising edge, and the transition from high to low a falling edge). In digital circuits the rise and fall times can typically be assumed to be near zero, and so we care less about the actual switching level. In the 555 we deliberately slow that transition so we can mark time with it.

edit: so why it's dome in a 555? It's done because you're measuring a falling voltage on a capacitor and it would make little sense to need a signal to go high when the capacitor's charge falls below some point. It would require additional complexity in the circuit that inverted logic neatly gets around.
 

vick5821

Jan 22, 2012
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Inverted logic is the one thing that gives people the most trouble.

You are pretty much conditioned to think 0v = low = off and Vcc = high = on.

This works for all the standard gates and logic because they are "positive logic"

However, occasionally (well, more than occasionally) the designer will decide that rather than the signal required to activate something being a high signal, it will be a low signal.

This inverted (or negative) logic kinda means that to turn something on, you have to turn it's input off.

So why would this be done?

Look at the most common use of a 555, as a astable oscillator. Essentially a capacitor is charged until it gets to about 2/3 Vcc at which time the voltage across the capacitor is detected by the 555 as a signal to start discharging.

This is positive logic, active high, and triggers (internally) a bistable to change state. This is pin 6, an input -- threshold. It is related to pin 5 (control), but this later pin is typically left either disconnected or connected to ground by a capacitor. Pin 6 is connected to the timing capacitor.

The capacitor is discharged via the discharge pin (7). This is an output which is effectively switched to ground by the flip flop (that has been triggered by pin 6 going above 2/3 Vcc. Typically this is also connected to the capacitor, but via a resistor to limit the discharge current, but also to provide a known discharge rate. To add a little confusion, this pin is also normally connected to Vcc via a resistor which is the charging route for the timing capacitor. Note that pin 7 (an output) is active low. When it's doing its discharge think it is pulled to ground.

Pin 2 (trigger) is an active low input. A trigger event happens when the voltage on this pin falls below 1/3 Vcc. As far as triggering is concerned, high is off (untriggered) and low is ON (triggered). This matches the discharge pin's inverted logic. It matches it for a very good reason. The discharge pin, when low will be discharging the timing capacitor. Pin 2 is also connected to the capacitor (pins 2 and 6 are typically connected together so that they sample the same voltage). As this drops to below 1/3 Vcc, this is activated, and it changes the state of the internal flip flop. This turns off the discharge pin (7), and the capacitor can start to charge again.

Things happen a little differently when wired as a monostable or bistable, but the same inverted logic exists on some pins because they are designed to detect a voltage falling through a particular level vs the positive logic which is there to detect a voltage rising through a particular level.

In digital circuits (the 555 is a bit of an analog/digital hybrid) inverted vs normal logic can be used to detect falling vs rising edges (we call a transition from low to high a rising edge, and the transition from high to low a falling edge). In digital circuits the rise and fall times can typically be assumed to be near zero, and so we care less about the actual switching level. In the 555 we deliberately slow that transition so we can mark time with it.

edit: so why it's dome in a 555? It's done because you're measuring a falling voltage on a capacitor and it would make little sense to need a signal to go high when the capacitor's charge falls below some point. It would require additional complexity in the circuit that inverted logic neatly gets around.

Wow! Well explained.
I would need some time to digest it!

Thank you :)
 

vick5821

Jan 22, 2012
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Inverted logic is the one thing that gives people the most trouble.

You are pretty much conditioned to think 0v = low = off and Vcc = high = on.

This works for all the standard gates and logic because they are "positive logic"

However, occasionally (well, more than occasionally) the designer will decide that rather than the signal required to activate something being a high signal, it will be a low signal.

This inverted (or negative) logic kinda means that to turn something on, you have to turn it's input off.

So why would this be done?

Look at the most common use of a 555, as a astable oscillator. Essentially a capacitor is charged until it gets to about 2/3 Vcc at which time the voltage across the capacitor is detected by the 555 as a signal to start discharging.

This is positive logic, active high, and triggers (internally) a bistable to change state. This is pin 6, an input -- threshold. It is related to pin 5 (control), but this later pin is typically left either disconnected or connected to ground by a capacitor. Pin 6 is connected to the timing capacitor.

The capacitor is discharged via the discharge pin (7). This is an output which is effectively switched to ground by the flip flop (that has been triggered by pin 6 going above 2/3 Vcc. Typically this is also connected to the capacitor, but via a resistor to limit the discharge current, but also to provide a known discharge rate. To add a little confusion, this pin is also normally connected to Vcc via a resistor which is the charging route for the timing capacitor. Note that pin 7 (an output) is active low. When it's doing its discharge think it is pulled to ground.

Pin 2 (trigger) is an active low input. A trigger event happens when the voltage on this pin falls below 1/3 Vcc. As far as triggering is concerned, high is off (untriggered) and low is ON (triggered). This matches the discharge pin's inverted logic. It matches it for a very good reason. The discharge pin, when low will be discharging the timing capacitor. Pin 2 is also connected to the capacitor (pins 2 and 6 are typically connected together so that they sample the same voltage). As this drops to below 1/3 Vcc, this is activated, and it changes the state of the internal flip flop. This turns off the discharge pin (7), and the capacitor can start to charge again.

Things happen a little differently when wired as a monostable or bistable, but the same inverted logic exists on some pins because they are designed to detect a voltage falling through a particular level vs the positive logic which is there to detect a voltage rising through a particular level.

In digital circuits (the 555 is a bit of an analog/digital hybrid) inverted vs normal logic can be used to detect falling vs rising edges (we call a transition from low to high a rising edge, and the transition from high to low a falling edge). In digital circuits the rise and fall times can typically be assumed to be near zero, and so we care less about the actual switching level. In the 555 we deliberately slow that transition so we can mark time with it.

edit: so why it's dome in a 555? It's done because you're measuring a falling voltage on a capacitor and it would make little sense to need a signal to go high when the capacitor's charge falls below some point. It would require additional complexity in the circuit that inverted logic neatly gets around.

What does it means by 'SR Latch' ?
http://www.electronicdesignworks.com/basic_electronics/555_timer/555_timer.htm
 

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What does it means by 'SR Latch' ?

Oddly enough, it's one of the things you've been talking about. It's a bistable circuit. In this case it's the simplest type, an SR flip-flop. SR simply refer to the two inputs (S)et and (R)eset.

On a rising edge on S, Q goes high, and Q-bar goes low.

On a rising edge or R, Q goes low and Q bar goes high.

If both S and R are low, the circuit does not change state.

If both S and R are high, the state is indeterminate -- which is a special way of saying "you don't normally do this".

The circuit for using a 555 as a bistable effectively disables any action of parts of the 555 other than this.

Note that pin 4 of the 555, while called "reset" is actually connected to the "clear" function of the flip flop. Also note that the flip flop is not constructed from logic gates, so you won't find the structures you would normal expect to find (e.g. an SR flip flop usually doesn't have a clear pin.

edit: it's normally called a latch because (in a way) Q and Q-bar latch the most recent values of S and R
 
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