How to realize the high accurate delay for analog signal?

[Fox zhou]

My destination is to release an analog signal after a programmable
delay time from the trigger signal is captured. The delay time is
10-50us, the accuracy is required under 1ns.
I propose a scheme shown as following simple diagram.

Memory DAC
|------------| |--------|
|A0 D0 |------>|D0 |
|Am Dn |------>|Dn |->Analog output
Control---->|------------| | |
| |
DAC clk source->|-------| | |
| Logic |------->|CLK |
Trigger-->Delay circuit-->|-------| | |
|--------|

The digitalized analog signal is stored in the memory, when the
trigger signal is captured, I start the delay circuit. When the delay
time is touched, the DAC clock is enabled to pass the logic control
gate. Then the DAC can run on the clock with the stored data feed in
to the DAC. Through this way, the analog signal is delayed.

My problems are:
1. How could I create the high resolution delay time?
2. Are there other methods to realize my destination?
3. It seems that using a 1GHz reference clock and corresponding
counter is reasonable to get the 1ns resolution. But who can tell me
what kind of chips I need ?

Any of your suggestions and new ideas are welcome.