how P, N type is blown to wafer?

So in a wafer, in the process of dopant addtion and diffustion, I
understand it is ion implantation to blow a a donor to the vacant
space. Does this apply only to P? how about N type? In reality, for a
transistor, do PNP sit above each other? or in the same planor?

If one sits above another, that means, when blowing ion, there has to
be some kind of strength difference?

 

: So in a wafer, in the process of dopant addtion and diffustion, I
: understand it is ion implantation to blow a a donor to the vacant
: space. Does this apply only to P? how about N type? In reality, for a
: transistor, do PNP sit above each other? or in the same planor?

: If one sits above another, that means, when blowing ion, there has to
: be some kind of strength difference?

Both P and N types are additions to wafers. All processes are
different, but P type material can be created by adding "holes" to
Silicon, a group 4 (4 valence electrons) element. This can be done by
adding atoms of a group 3 element (Like Boron, with 3 valence electrons.)
Similarly, to get N type material, excess electrons must be added to
Silicon, which can be accomplished by adding atoms of a group 5 element
(Like Phosphorous, with 5 valence electrons) can be added. I have no idea
whether modern fabs actually use implants with Boron and Phosphorous to
make P and N type material, but theoretically, that's one way to do it.
So, to answer your question, ion implantation is used for both types of
material, just with different types of ions.

Both CMOS and Bipolar transistors are 3-dimensional objects.
Since you asked about Bipolar transistors, I'll talk about them (they're
easier to describe, anyway. A bipolar transistor (I'll talk about a PNP
type, since that is what you mentioned) is made by first implanting the
P-type collector. You can think of each of the terminals of the device as
cubes protruding into the wafer, with one face in the same plane as the
wafer. The collector is the biggest cube, and made of p-type material.
The base is the next-to-biggest cube, and made of n-type material. The
base cube is entirely surrounded by the collector cube. Finally, the
emitter is the smallest cube, and made of p-type material. The emitter
cube is completely surrounded by the base cube.

If you viewed the transistor from above, you would see 3
concentric squares. The largest is the collector, the next-to-largest is
the base, and the smallest is the emitter. Metal is then contacted to one
place on each of the 3 squares, which form the connections to the 3
terminals of the device.

Hopefully that explains things. I'm not good with ASCII art, so I
didn't even try.

Joe

 

usually layered,

yes, with electrostatic accelerators this can be done by adjusting the
voltage.

one way is to use different concentrations of dopant putting p-type over
n-type over p-type to mane an NPN.

Bye.
Jasen

 

The 8" wafer is sawed from a cylinder. The whole ingot is a single
crystal of N type silicon. A photo-resist mask is put on the wafer,
exposed to UV light, then a 'hot hydroflouric acid dip' removes the
resist (boy I bet it does), and thenthe wafers are put in a 'boat' in
the diffusion furnace and P type gas is blown across the surface, where
it diffuses into the N type at the hi temp. Above process is repeated
for next layer of P type, then metal connection layer on that. They
actually had an IC making lab at UF in the early '70s (so I guess all
this info is several decades old)