How does this SMPS chip keep the core from saturation

[Klaus Kragelund]

Hi

I'm looking at the MAX845 IC:

http://pdfserv.maxim-ic.com/en/ds/MAX845.pdf

It is a push-pull forward driver for a center-tapped transformer (see
page 5)

It has a flip/flop to get 50% duty cycle, but how do they prevent flux-
walking? Is that only done by the on-resistance of the MOSFETs?
(higher current leads to more voltage drop - regulating the flux)

Regards

Klaus

 

[Joel Kolstad]

It has a flip/flop to get 50% duty cycle, but how do they prevent flux-
walking? Is that only done by the on-resistance of the MOSFETs?

I took a quick look, and as far as I can tell it's that and the resistance of
the transformer winding -- which can problem be relatively significant given
the low powers involved.

 

[Joerg]

Hi

I'm looking at the MAX845 IC:

http://pdfserv.maxim-ic.com/en/ds/MAX845.pdf

It is a push-pull forward driver for a center-tapped transformer (see
page 5)

It has a flip/flop to get 50% duty cycle, but how do they prevent flux-
walking? Is that only done by the on-resistance of the MOSFETs?
(higher current leads to more voltage drop - regulating the flux)

Pretty much. A way to really combat staircase saturation would be
current mode control like on this one:

http://gltrs.grc.nasa.gov/reports/1997/TM-107414.pdf

But usually it's not a huge problem. If EMI is an issue this converter
might need a small inductor after the output rectifier. Also, the
transformer should be able to handle a small DC load caused by stuff
like not quite equal diodes etc. Sometimes people use airgapped cores
but I never had to on forward converters.

 

[James Arthur]

Hi

I'm looking at the MAX845 IC:

http://pdfserv.maxim-ic.com/en/ds/MAX845.pdf

It is a push-pull forward driver for a center-tapped transformer (see
page 5)

It has a flip/flop to get 50% duty cycle, but how do they prevent flux-
walking? Is that only done by the on-resistance of the MOSFETs?
(higher current leads to more voltage drop - regulating the flux)

Regards

Klaus

The break-before-make action guarantees about 200nS of dead-time per
cycle. That's 10% at the 450KHz minimum operating frequency, which
I'd think is enough time for a nearly-balanced core to reset, right?

Cheers,
James Arthur