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Holding a JK Stable at Startup

68sooner

Feb 16, 2012
3
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Feb 16, 2012
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I am working on a circuit where I need the Q output of a JK flip flop to start out low. I don't want the output to go high until I trigger the JK with a positive pulse. After the output goes high I am feeding it back through a nor gate to seal off the clock input and lock the output high. I can't seem to figure out how to force the initial Q output to be low. Any ideas?
 

68sooner

Feb 16, 2012
3
Joined
Feb 16, 2012
Messages
3
Actually, I am dividing a 14 bit azimuth pulse(IACP) down to a 12 bit azimuth pulse(ACP). I need the count to begin on the IACP directly after the ARP(North mark). The north mark is what is triggering the JK to start counting. The ARP and the Q output are being input to a nor gate whose output goes into the clock. Once the output goes high the nor gate stops inputs to the clock. That is why I need the Q output to start out low. If it starts out high, the ARP won't trigger the circuit to start counting in the right spot. Incidentally, the Q output is feed into an AND gate along with the IACP stream. So when the output goes high the IACP stream will pass through the AND gate and begin the counting process.
 

Raven Luni

Oct 15, 2011
798
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Oct 15, 2011
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Esoteric descriptions like that without diagrams tend to draw blank stares (I've done it myself), but as for the initial question, Jackorocko's suggestion is good. To elaborate, if you consider what a capacitor looks like in terms of current flow, it gradually goes from looking like a closed circuit to looking like an open circuit, so if you connect one in series with a resistor to either voltage rail, you will effectively have a pull up or pull down resistor for a limited amount of time once the current starts flowing. It is also good practice to add a fairly high value resistor (about an order of magnitude higher than your series resistor) in parallel with the capacitor to discharge it once the power is off.
 

68sooner

Feb 16, 2012
3
Joined
Feb 16, 2012
Messages
3
Thanks Raven. It all seems so straight forward while i'm looking at the schematic..LOL. I am bread boarding the circuit and will try the RC at the input. Thanks all. I'll let you know.
 
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