High voltage push-pull output stage

[Stefan Heinzmann]

Hi all,

I'm trying to come up with ways to build a DC coupled amplifier that can
produce +/- 400V output voltage swing at up to 100mA. Please don't
lecture me about dangerous voltages and the risk of killing myself. I
know. I just want to check out what the alternatives are and their
relative merits.

I think a push-pull ouput stage is called for, however there are no pnp
or p-channel transistors around that can withstand 800V or more. The
output devices therefore need to be either npn BJTs, n-channel MOSFETs,
IGBTs or tubes/valves. So you need some form of phase splitting driver
stage that ensures proper bias for the output stage. The amplifier
should have good pulse response, but needn't have very good distortion
ratings or wide bandwidth. The step response should settle reasonably
well within about 30µs. Amplification is a fixed factor of 10.

I have experimented with MOSFETs and a traditional phase-splitter in a
spice simulation but got no reasonable results. I tried to use the two
outputs of a differential amplifier, but that didn't work right, either.
The problem always seems to be the bias for the MOSFET whose gate swings
up and down with the load. I finally used a pair of optocouplers to
couple the differential input amplifier to the output stage while giving
me freedom in shifting the voltage. That sort of works. I need some
locally stabilized voltage for each MOSFET gate driver, however. For the
moment I use a zener diode together with a constant current source made
from a depletion mode MOSFET. I also thought of using tiny DC/DC
converter modules, but they're not cheap. And it is not really elegant.
I don't like it.

Are there any other ways? Or information on phase splitters that work
properly down to DC? How would you approach the problem?

Cheers
Stefan

 

[Winfield Hill]

Stefan Heinzmann wrote...

I'm trying to come up with ways to build a DC coupled amplifier that
can produce +/- 400V output voltage swing at up to 100mA.

I think a push-pull ouput stage is called for, however there are no
pnp or p-channel transistors around that can withstand 800V or more.
The output devices therefore need to be either npn BJTs, n-channel
MOSFETs, IGBTs or tubes/valves. So you need some form of phase
splitting driver stage that ensures proper bias for the output stage.
The amplifier should have good pulse response, but needn't have very
good distortion ratings or wide bandwidth. The step response should
settle reasonably well within about 30µs. Amplification is a fixed
factor of 10.

Traditional push-pull circuits with N-type devices can work if
you're using an output transformer. But in that case you can
use a step-up ratio and don't need to use high-voltage parts,
or stick to one polarity type for that matter.

Given that 1200V MOSFETs are readily available, it's easy to
make up to +/-600V dc-coupled amplifiers, using a totem-pole
output stage like we show in AoE, fig. 3.75, but with an added
negative rail and level-shift stage. Here's the basic idea:

.. basic high-voltage MOSFET dc amplifier
.. by Winfield Hill
..
.. + supply rail -----------------+-------,
.. | |
.. R11 |
.. | D
.. +--+--G
.. C2 | | S
.. ,--R4--||-, | C |
.. IN | | | B--+
.. o--R3--+--|+\ | | E |
.. | >---+--R5--, | | R10
.. ,--|-/ | | | | out
.. | E | '----+-+--R12--o
.. | gnd -+- B | D1 |
.. | | C +--|<|----+
.. | | | | |
.. +---------- | -- | ------- | -+--R2--+
.. | | | | | |
.. R1 R13 | C3 | '--||--+
.. | | E ,-||--+ C1 |
.. gnd +- B | | |
.. | C R8 | R9
.. | | | D |
.. R14 +---++--G C4
.. | | | S |
.. | R6 C | gnd
.. | | B--+
.. | | E | Add a zener across
.. | | | R7 each FET's gate.
.. | | | |
.. - supply rail --+----+----+----'

The circuit is inexpensive and works well at low frequencies
but it can be further enhanced for a -3dB bandwidth over 100kHz.
As you can see the circuit includes short-circuit protection.
My finished designs generally have more parts to add features
such as HV-output monitoring, reduced cross-over distortion,
increased slew rate, improved power-supply rejection, etc.

Thanks,
- Win

whill_at_picovolt-dot-com

 

[Stefan Heinzmann]

Stefan Heinzmann wrote...



Traditional push-pull circuits with N-type devices can work if
you're using an output transformer. But in that case you can
use a step-up ratio and don't need to use high-voltage parts,
or stick to one polarity type for that matter.

Yes, sure. That's what the tube/valve guys have done all from the
beginning. A center tapped primary on the output transformer allows the
usage of one polarity type very easily. But as I need DC coupling, that
wasn't an option. You are well aware of that of course.

Given that 1200V MOSFETs are readily available, it's easy to
make up to +/-600V dc-coupled amplifiers, using a totem-pole
output stage like we show in AoE, fig. 3.75, but with an added
negative rail and level-shift stage. Here's the basic idea:

Still haven't bought AoE, I have to admit. Last time I stood in front of
it I thought I would be rather annoyed to find the next edition to be
available a few months after I bought the old one. So I decided to wait
some more. But it is getting longer and longer...

(But I don't want to urge you. A hurried book often is a poor book).

. basic high-voltage MOSFET dc amplifier
. by Winfield Hill
.
. + supply rail -----------------+-------,
. | |
. R11 |
. | D
. +--+--G
. C2 | | S
. ,--R4--||-, | C |
. IN | | | B--+
. o--R3--+--|+\ | | E |
. | >---+--R5--, | | R10
. ,--|-/ | | | | out
. | E | '----+-+--R12--o
. | gnd -+- B | D1 |
. | | C +--|<|----+
. | | | | |
. +---------- | -- | ------- | -+--R2--+
. | | | | | |
. R1 R13 | C3 | '--||--+
. | | E ,-||--+ C1 |
. gnd +- B | | |
. | C R8 | R9
. | | | D |
. R14 +---++--G C4
. | | | S |
. | R6 C | gnd
. | | B--+
. | | E | Add a zener across
. | | | R7 each FET's gate.
. | | | |
. - supply rail --+----+----+----'

Thanks a lot! I'll put this through simulation.

The transistors either side of R13 are PNPs you stacked in order to get
the required Vceo rating, correct?

The proper value of R11 seems critical to me, as there will be a
compromise between output rise time and power dissipation. Do you think
a constant current source would be worth it here? (It would probably
need to be built from a high voltage depletion mode MOSFET, and there
aren't many...)

R9 and C4 are a snubber network, right?

The circuit is inexpensive and works well at low frequencies
but it can be further enhanced for a -3dB bandwidth over 100kHz.
As you can see the circuit includes short-circuit protection.
My finished designs generally have more parts to add features
such as HV-output monitoring, reduced cross-over distortion,
increased slew rate, improved power-supply rejection, etc.

I noticed the current limiting. I agree with you that this is a
necessary feature. Not sure what you mean with HV-output monitoring. Do
you think of a second error amplifier to shut down the circuit in case
of output overvoltage?

Cheers
Stefan

 

[John Larkin]

Stefan Heinzmann wrote...

Traditional push-pull circuits with N-type devices can work if
you're using an output transformer. But in that case you can
use a step-up ratio and don't need to use high-voltage parts,
or stick to one polarity type for that matter.

Given that 1200V MOSFETs are readily available, it's easy to
make up to +/-600V dc-coupled amplifiers, using a totem-pole
output stage like we show in AoE, fig. 3.75, but with an added
negative rail and level-shift stage. Here's the basic idea:

. basic high-voltage MOSFET dc amplifier
. by Winfield Hill
.
. + supply rail -----------------+-------,
. | |
. R11 |
. | D
. +--+--G
. C2 | | S
. ,--R4--||-, | C |
. IN | | | B--+
. o--R3--+--|+\ | | E |
. | >---+--R5--, | | R10
. ,--|-/ | | | | out
. | E | '----+-+--R12--o
. | gnd -+- B | D1 |
. | | C +--|<|----+
. | | | | |
. +---------- | -- | ------- | -+--R2--+
. | | | | | |
. R1 R13 | C3 | '--||--+
. | | E ,-||--+ C1 |
. gnd +- B | | |
. | C R8 | R9
. | | | D |
. R14 +---++--G C4
. | | | S |
. | R6 C | gnd
. | | B--+
. | | E | Add a zener across
. | | | R7 each FET's gate.
. | | | |
. - supply rail --+----+----+----'

The circuit is inexpensive and works well at low frequencies
but it can be further enhanced for a -3dB bandwidth over 100kHz.
As you can see the circuit includes short-circuit protection.
My finished designs generally have more parts to add features
such as HV-output monitoring, reduced cross-over distortion,
increased slew rate, improved power-supply rejection, etc.

Thanks,
- Win

whill_at_picovolt-dot-com

Nice circuit. D1 can be a zener, and you can bootstrap R11 for a bit
faster pullup.

This is a true class B widget, which works but sort of always bothers
me mentally.

John

 

[John Larkin]

You could buy one of these...

http://eportal.apexmicrotech.com/mainsite/pdf/pa97u.pdf

What's really annoying about this is that Apex clearly has a source
for small 900 volt p-channel fets, and I don't.

John

 

[Winfield Hill]

Stefan Heinzmann wrote...

Still haven't bought AoE, I have to admit. Last time I stood in front
of it I thought I would be rather annoyed to find the next edition to
be available a few months after I bought the old one. So I decided to
wait some more. But it is getting longer and longer...

Sadly, I can say don't wait; it's going to be a while. Furthermore
the next edition is probably going to have masses of cool stuff in
the present edition excised to make room for new stuff and to allow
for a reduction in page count to keep the price under $100. In the
end you'll want a copy of all the editions. :>)

Thanks a lot! I'll put this through simulation.

The transistors either side of R13 are PNPs you stacked in order
to get the required Vceo rating, correct?

Yes, that's a cascode stage necessary for voltages above +/-300V
or so, depending on what you choose for Q1. Examples are mpsa92,
2n6520, ztx558, bf493, ksp94, fzt560, fmmt560, nzt560, ksa1625,
stx93003, 2n5416, 2n5657, etc., depending on desired slew rate.

The proper value of R11 seems critical to me, as there will be
a compromise between output rise time and power dissipation.

Indeed. It's the Coss of Q4 and the Crss of Q3 plus Q4 that
you're fighting (if high speed is desired, be careful to choose
a small FET type). The R11 resistor(s) need to withstand the
full rail-to-rail supply voltage, 800 to 1200V, etc. I use three
or four power resistors in series to stay well under the maximum
voltage ratings and to allow dissipating more heat.

Do you think a constant current source would be worth it here?
(It would probably need to be built from a high voltage depletion
mode MOSFET, and there aren't many...)

There are several issues: to increase the pull-up current (and
thus slew-rate) for outputs near the positive rail, to reduce
total power consumption near the negative rail, etc. The former
can be handled in some cases by splitting R11 and bootstrapping
the junction with a capacitor to the output, as John mentioned.

As for a current source, you'd want to make it from multiple PNP
cascode transistors, like Q1 Q2, because a high-voltage FET has
too much capacitance. Generally it's easier to just use bigger
resistors instead. One possible enhancement relates to R11; the
amplifier's loop gain decreases at high frequencies, decreasing
the positive-supply PSRR. Filtering R11 fixes this issue.

R9 and C4 are a snubber network, right?

A big issue is high-frequency compensation, especially into a
capacitive load. C4 adds a permanent minimum capacitive load,
simplifying the scene, and R9 adds a helpful feedback-loop zero.

I noticed the current limiting. I agree with you that this is a
necessary feature. Not sure what you mean with HV-output monitoring.
Do you think of a second error amplifier to shut down the circuit
in case of output overvoltage?

It's a pain to always find a HV probe for measurements (ordinary
probes aren't rated above 250V or so, and at any rate one hates
to stress expensive scope probes). The R1 R2 node can't be used
as an accurate monitoring point because of C1. There are several
good possibilities to solve the problem.

John suggested using a zener for D1, saving one component. This
is reasonable for low-frequency amplifiers, but the high zener
capacitance would damage performance at even moderate frequencies
by increasing the crossover distortion. In fact, some kind of
magical network is needed at point X to isolate the desired fast
crossover from the Q5 FET's pullup capacitance.

Thanks,
- Win

whill_at_picovolt-dot-com

 

[Spehro Pefhany]

You could buy one of these...

http://eportal.apexmicrotech.com/mainsite/pdf/pa97u.pdf

What's really annoying about this is that Apex clearly has a source
for small 900 volt p-channel fets, and I don't.

John

The highest standard one I know of in DPAK is 600V (Japanese).

Best regards,
Spehro Pefhany

 

[Winfield Hill]

John Larkin wrote...

You could buy one of these...
http://eportal.apexmicrotech.com/mainsite/pdf/pa97u.pdf

The PA97 opamp is nice, but lacks an output current limit.

We needed to replace APEX's incredibly-noisy PA42 mosfet-
input opamps, so I created a small "daughterboard" PCB,
mounting a PA97 but with a PA42 pinout. My PCB includes a
current-limit circuit, plus my favorite LDN150 as a current-
sink pulldown to reduce the PA97's high crossover distortion.
We've made more than 25 of these little PCBs already.

What's really annoying about this is that Apex clearly has
a source for small 900 volt p-channel fets, and I don't.

No, they use an internal cascode circuit, probably with two
each Supertex VP1550 and VP2450 dies for Q3 and Q10, resp.
We ordinary mortals can order the VP2450 parts. :>) Their
schematic doesn't show other critical items. For example
the input JFETs are 2n3955 (which is why it's quiet), so
clearly they haven't shown the necessary cascode stage to
work with Q6 and Q7. Their schematic shows 22 parts, but
their website photo shows 40 or more. :>)

Thanks,
- Win

whill_at_picovolt-dot-com

 

[John Larkin]

Hi all,

I'm trying to come up with ways to build a DC coupled amplifier that can
produce +/- 400V output voltage swing at up to 100mA. Please don't
lecture me about dangerous voltages and the risk of killing myself. I
know. I just want to check out what the alternatives are and their
relative merits.

I think a push-pull ouput stage is called for, however there are no pnp
or p-channel transistors around that can withstand 800V or more. The
output devices therefore need to be either npn BJTs, n-channel MOSFETs,
IGBTs or tubes/valves. So you need some form of phase splitting driver
stage that ensures proper bias for the output stage. The amplifier
should have good pulse response, but needn't have very good distortion
ratings or wide bandwidth. The step response should settle reasonably
well within about 30µs. Amplification is a fixed factor of 10.

I have experimented with MOSFETs and a traditional phase-splitter in a
spice simulation but got no reasonable results. I tried to use the two
outputs of a differential amplifier, but that didn't work right, either.
The problem always seems to be the bias for the MOSFET whose gate swings
up and down with the load. I finally used a pair of optocouplers to
couple the differential input amplifier to the output stage while giving
me freedom in shifting the voltage. That sort of works. I need some
locally stabilized voltage for each MOSFET gate driver, however. For the
moment I use a zener diode together with a constant current source made
from a depletion mode MOSFET. I also thought of using tiny DC/DC
converter modules, but they're not cheap. And it is not really elegant.
I don't like it.

Are there any other ways? Or information on phase splitters that work
properly down to DC? How would you approach the problem?

Cheers
Stefan

I have a similar problem. I need a small, cheap, low quiescent power
linear amp to drive an e-o modulator (maybe a 50 pF load) with
risetime roughly in the 100 usec range, 800-1000 volts p-p.

One cool thing to make is a fet-optoisolator cascode. The fet can be a
depletion mode thingie

|
|
d
g---+
s |
| |
c |
===> b |
e |
| |
+----+
|

or, if the parts aren't available, use a regular HV mosfet and bias up
the gate with a second P-V optoisolator.

The obvious refinements are, well, obvious.

John

 

[Stefan Heinzmann]

Stefan Heinzmann wrote...



Sadly, I can say don't wait; it's going to be a while. Furthermore
the next edition is probably going to have masses of cool stuff in
the present edition excised to make room for new stuff and to allow
for a reduction in page count to keep the price under $100. In the
end you'll want a copy of all the editions. :>)

Hmm, you almost talked me into it. Need to sleep on it..

I got a lot of crap in simulation until I realized that the OpAmp inputs
are the wrong way round. Amazingly, I got situations where the output
still toggled! Shame on me for needing so long to realize this!

Yes, that's a cascode stage necessary for voltages above +/-300V
or so, depending on what you choose for Q1. Examples are mpsa92,
2n6520, ztx558, bf493, ksp94, fzt560, fmmt560, nzt560, ksa1625,
stx93003, 2n5416, 2n5657, etc., depending on desired slew rate.

I had picked the first one already, which probably is THE standard high
voltage small signal PNP.

Indeed. It's the Coss of Q4 and the Crss of Q3 plus Q4 that
you're fighting (if high speed is desired, be careful to choose
a small FET type). The R11 resistor(s) need to withstand the
full rail-to-rail supply voltage, 800 to 1200V, etc. I use three
or four power resistors in series to stay well under the maximum
voltage ratings and to allow dissipating more heat.

I tried it with the IRFBG20, as I could get a spice model for it. But I
didn't get far enough yet to tell whether my design goals are met.

There are several issues: to increase the pull-up current (and
thus slew-rate) for outputs near the positive rail, to reduce
total power consumption near the negative rail, etc. The former
can be handled in some cases by splitting R11 and bootstrapping
the junction with a capacitor to the output, as John mentioned.

It was precisely those issues I was worrying about.

As for a current source, you'd want to make it from multiple PNP
cascode transistors, like Q1 Q2, because a high-voltage FET has
too much capacitance. Generally it's easier to just use bigger
resistors instead. One possible enhancement relates to R11; the
amplifier's loop gain decreases at high frequencies, decreasing
the positive-supply PSRR. Filtering R11 fixes this issue.

Thanks a lot for those tips! When cascoding PNPs for a current source, I
realize that 2 transistors won't be enough. I haven't got any experience
with the dynamic behaviour of such constructs. Do I need to worry about
uneven division of the voltage drop during transients? Or will that sort
out itself automatically?

A big issue is high-frequency compensation, especially into a
capacitive load. C4 adds a permanent minimum capacitive load,
simplifying the scene, and R9 adds a helpful feedback-loop zero.

The load may be reactive in my case, so the provision is welcome.

It's a pain to always find a HV probe for measurements (ordinary
probes aren't rated above 250V or so, and at any rate one hates
to stress expensive scope probes). The R1 R2 node can't be used
as an accurate monitoring point because of C1. There are several
good possibilities to solve the problem.

Ah, ok, I didn't think of this. Do you typically include such circuitry
as a permanent part of your design?

John suggested using a zener for D1, saving one component. This
is reasonable for low-frequency amplifiers, but the high zener
capacitance would damage performance at even moderate frequencies
by increasing the crossover distortion. In fact, some kind of
magical network is needed at point X to isolate the desired fast
crossover from the Q5 FET's pullup capacitance.

You meant Q4, didn't you?

Cheers
Stefan

 

[Winfield Hill]

John Larkin wrote...

I have a similar problem. I need a small, cheap, low quiescent
power linear amp to drive an e-o modulator (maybe a 50 pF load)
with risetime roughly in the 100 usec range, 800-1000 volts p-p.

That's not a hard requirement, i = C dV/dt = 1mA max, including
50pF of FET capacitance. Really wimpy parts are allowed. :>)

Thanks,
- Win

whill_at_picovolt-dot-com

 

[Stefan Heinzmann]

John Larkin wrote:
[snip...]

This is a true class B widget, which works but sort of always bothers
me mentally.

What is it that bothers your mind? Is it the distortion problems?

Cheers
Stefan

 

[Winfield Hill]

Stefan Heinzmann wrote...

I tried it with the IRFBG20, as I could get a spice model for it.
But I didn't get far enough yet to tell whether my design goals
are met.

The BG20 is not a bad transistor, a bit old, but well suited
because of its modest capacitance. I purchased 200 last year.

You may or may not get a Spice model of the schematic to work,
but don't rely on it to tell you much about the real circuit.
That's because most power MOSFET spice models are completely
unsuitable for low-level linear use. They fail to model the
sub-threshold region at all, and most totally screw up in the
critical low-current unsaturated-operation region. One needs
accurate g_m and Id-vs-Vgs modeling at 0.1 to 100mA currents,
and good capacitance-vs-voltage modeling as well.

For example, see the g_m curve in AoE page 132 and the Id vs.
gate-voltage curve on page 123. Power MOSFET models should
show g_m leaving the g_m = I/Vt curve with a new sqrt Id slope
in the Id = 1mA to 50mA region, but sadly many models show the
FET complete off with the appropriate gate voltages!

We've discussed this issue here on s.e.d., with my recent
power MOSFET measurements used to illustrate the problem.

I'll check the BG20 models I have, but don't hold your breath!

Thanks,
- Win

whill_at_picovolt-dot-com

 

[Winfield Hill]

Stefan Heinzmann wrote...

John Larkin wrote:
[snip...]

This is a true class B widget, which works but sort of always bothers
me mentally.

What is it that bothers your mind? Is it the distortion problems?

The transition from pullup to pulldown is one sad issue, but a more
serious issue is the differing pullup / pulldown operating modes.

In pullup it's operating as a common-source stage with low drain
currents (1mA, etc) with a high-value load resistor (i.e. high gain)
followed by a low-Z output follower. By contrast, in pulldown it's
operating as a common-source stage, at higher currents (when high
negative dV/dt is present), with the common-source load impedance
given by the actual load, which may be reactive. Intuitively this
is not a very appealing situation. But like John says, with some
effort and a good understanding, it can be made to work quite well.

Thanks,
- Win

whill_at_picovolt-dot-com

 

[Winfield Hill]

Winfield Hill wrote...

Stefan Heinzmann wrote...

The BG20 is not a bad transistor, a bit old, but well suited
because of its modest capacitance. I purchased 200 last year.

You may or may not get a Spice model of the schematic to work,
but don't rely on it to tell you much about the real circuit.
That's because most power MOSFET spice models are completely
unsuitable for low-level linear use. They fail to model the
sub-threshold region at all, and most totally screw up in the
critical low-current unsaturated-operation region. One needs
accurate g_m and Id-vs-Vgs modeling at 0.1 to 100mA currents,
and good capacitance-vs-voltage modeling as well.

For example, see the g_m curve in AoE page 132 and the Id vs.
gate-voltage curve on page 123. Power MOSFET models should
show g_m leaving the g_m = I/Vt curve with a new sqrt Id slope
in the Id = 1mA to 50mA region, but sadly many models show the
FET complete off with the appropriate gate voltages!

We've discussed this issue here on s.e.d., with my recent
power MOSFET measurements used to illustrate the problem.

I'll check the BG20 models I have, but don't hold your breath!

Sorry, old chap, but the model is very poor for linear use.

Below Vgs = 2.9V the current is nearly zero, with no log region
as it should have. Between 2.9 and 3.0V it rises rapidly to 5mA
(very poorly modeled), from 3.0 and 3.5V it increases to 120mA
(not too bad, but probably lower g_m than a real part) and above
4.5V it slowly meanders above 1A, finally reaching 5A or so.
The spice model is not too bad above 50mA.

..SUBCKT IRFBG20 10 20 40
* TERMINALS: D G S
M1 1 2 3 3 DMOS L=1U W=1U
RD 10 1 5.22
RS 30 3 0.276
RG 20 2 107
CGS 2 3 483P
EGD 12 0 2 1 1
VFB 14 0 0
FFB 2 1 VFB 1
CGD 13 14 218P
R1 13 0 1
D1 12 13 DLIM
DDG 15 14 DCGD
R2 12 15 1
D2 15 0 DLIM
DSD 3 10 DSUB
LS 30 40 7.5N
..MODEL DMOS NMOS (LEVEL=1 LAMBDA=2M VTO=3.1 KP=0.833)
..MODEL DCGD D (CJO=218P VJ=0.6 M=0.68)
..MODEL DSUB D (IS=5.81N N=1.5 RS=0.536 BV=1K CJO=151P VJ=0.8 M=0.42 TT=130N)
..MODEL DLIM D (IS=100U)
..ENDS

Thanks,
- Win

whill_at_picovolt-dot-com

 

[John Larkin]

John Larkin wrote:
[snip...]

This is a true class B widget, which works but sort of always bothers
me mentally.

What is it that bothers your mind? Is it the distortion problems?

Cheers
Stefan

I guess it's the idea of closing a feedback loop around a zero-gain
deadband, especially when driving a capacitive load. A tiny bit of
noise could be conjectured to flail the drive node like crazy. I
suppose the residual AC feedthrough (fet g-s and the output diode
capacitance) keeps the gain from being truly zero.

John

 

[John Larkin]

John Larkin wrote...

That's not a hard requirement, i = C dV/dt = 1mA max, including
50pF of FET capacitance. Really wimpy parts are allowed. :>)

Thanks,
- Win

whill_at_picovolt-dot-com

Fairchild has an optocoupler with a 400 volt output transistor, which
makes a cool 400 v p-p amp using just a pair of optos as the output
totem pole. CTR is a little low, but usable. Too bad nobody makes a
kilovolt photofet! All the optomos SSRs I've seen have Schmitt action,
darn it.

John

 

[Winfield Hill]

John Larkin wrote...

I guess it's the idea of closing a feedback loop around a zero-gain
deadband, especially when driving a capacitive load. A tiny bit of
noise could be conjectured to flail the drive node like crazy. I
suppose the residual AC feedthrough (fet g-s and the output diode
capacitance) keeps the gain from being truly zero.

Most of my designs have a single conveniently-placed resistor
that eliminates this reasonable but apparently-bogus fear.

Thanks,
- Win

whill_at_picovolt-dot-com

 

[John Larkin]

Most of my designs have a single conveniently-placed resistor
that eliminates this reasonable but apparently-bogus fear.

Thanks,
- Win

whill_at_picovolt-dot-com

That's OK if it doesn't steal too much drive; then it just makes
things worse, but at least in a different way. It's is a nice way to
kill crossover distortion in a complementary power amp and still run
the output parts 'class B' which is thermally nice.

I sometimes build transconductance amps, which is a whole different
kettle of squids. The crossover situation there is tricky and also
philosophically disturbing. But heck, I'm not a philosopher.

John

 

[Winfield Hill]

John Larkin wrote...

That's OK if it doesn't steal too much drive; then it just makes
things worse, but at least in a different way. It's is a nice way
to kill crossover distortion in a complementary power amp and
still run the output parts 'class B' which is thermally nice.

It's especially appropriate for high-voltage amplifiers used to
drive piezo elements, which look like a big capacitor. After
the hard work is done slewing the output to a new voltage
(charge/discharge the piezo capacitor), the amplifier has no
further job except to maintain the output to a fine degree.
The added resistor (a large value, as you say) helps to insure
the viability of the amplifier's fine control at dc, where the
output load appears to be an open circuit. Another application
with similar dc "open circuit" load properties is creating the
voltages for ion-beam lens, focus or steering electrodes. One
of our systems has nearly 50 electrodes, so a simple compact
inexpensive amplifier circuit is appropriate for 50 amplifiers.

Thanks,
- Win

whill_at_picovolt-dot-com