H
Hank
- Jan 1, 1970
- 0
During my searches for parts (ADCs, DACs, memories) I have encountered many
usefull devices that have a simple 4 wire SPI communication scheme. Most of the
parts can operate with a SPI clock of 20mhz to 30mhz, but most of the
microcontrollers (8 bit and some 32 bit ARM types) limit the SPI clock to 8mhz
or so. Also, most microcontrollers have one, or at the most two SPI ports, and
they have very little hardware to assist in transfer (buffers, etc.).
There are so many cases where the included junk in a microcontroller is
insufficient anyway (slow or low resolution ADC, no DAC, not enough flash for
data storage, blah blah). What I would like to see is a microcontroller with
perhaps lots of internal sram, maybe some flash, and about 4 to 6 high speed
(30+mhz) SPI ports, each with a 16 byte buffer and some sort of dma controller
to main memory.
How cool would this be? The end user could then select the peripherals that
they need, and there would be enough speed and processor power to support them.
Am I just dreaming here? I guess you could build this device in an fpga, but it
would not be the ideal solution.
usefull devices that have a simple 4 wire SPI communication scheme. Most of the
parts can operate with a SPI clock of 20mhz to 30mhz, but most of the
microcontrollers (8 bit and some 32 bit ARM types) limit the SPI clock to 8mhz
or so. Also, most microcontrollers have one, or at the most two SPI ports, and
they have very little hardware to assist in transfer (buffers, etc.).
There are so many cases where the included junk in a microcontroller is
insufficient anyway (slow or low resolution ADC, no DAC, not enough flash for
data storage, blah blah). What I would like to see is a microcontroller with
perhaps lots of internal sram, maybe some flash, and about 4 to 6 high speed
(30+mhz) SPI ports, each with a 16 byte buffer and some sort of dma controller
to main memory.
How cool would this be? The end user could then select the peripherals that
they need, and there would be enough speed and processor power to support them.
Am I just dreaming here? I guess you could build this device in an fpga, but it
would not be the ideal solution.