High Side Pulse Transmitter

[[email protected]]

Ok, this is the current design of our high side pulse transmitter we
are using. Please view with fixed width font.

VCC
+
|
.-------o------o-----------'
| | | |
.-. | | |
| |2K | | |
| | | 6V | |
'-' | z |/
| |< A .---|
o---o-| | | |>
| |\ | | |
.-. | | | |
| | .------|-----o o------
| |20K | | | |
'-' | .-. | |
| | | | | |<
| | | | ----|
| | '-'200R |\
||-+ .-. | ___ |
||<- | | | .--|___|--|
o----||-+ | | | | 10K .-.
| '-' \| | |||
. 100K | |-' | |
| | <| '-'200R
| | .| |
|-------o------------------|
===
GND
(created by AACircuit v1.28.6 beta 04/19/05 www.tech-chat.de)

The circuit should have the following features:

1. True logic; high input produces high output, etc.
2. Operates with Vcc from 24V to 50V.
3. High output is slightly less than Vcc, low is better than 6V less
than Vcc (exa, Vh = Vcc - 0.5, Vl = Vcc - 6.0)
4. Riseing and falling edges should be as fast as possible.
5. Load is from 10mA to a maximum of 125mA, and capacitance from 0 to
about 1.5uF.

The problem with this circuit is the output bounces on the falling
edge. Can anybody suggest a fix, or an alternate circuit?

Jeff Stout

 

[Joerg]

Hello Jeff,

Ok, this is the current design of our high side pulse transmitter we
are using. Please view with fixed width font.

VCC
+
|
.-------o------o-----------'
| | | |
.-. | | |
| |2K | | |
| | | 6V | |
'-' | z |/
| |< A .---|
o---o-| | | |>
| |\ | | |
.-. | | | |
| | .------|-----o o------
| |20K | | | |
'-' | .-. | |
| | | | | |<
| | | | ----|
| | '-'200R |\
||-+ .-. | ___ |
||<- | | | .--|___|--|
o----||-+ | | | | 10K .-.
| '-' \| | |||
. 100K | |-' | |
| | <| '-'200R
| | .| |
|-------o------------------|
===
GND
(created by AACircuit v1.28.6 beta 04/19/05 www.tech-chat.de)

The circuit should have the following features:

1. True logic; high input produces high output, etc.
2. Operates with Vcc from 24V to 50V.
3. High output is slightly less than Vcc, low is better than 6V less
than Vcc (exa, Vh = Vcc - 0.5, Vl = Vcc - 6.0)
4. Riseing and falling edges should be as fast as possible.
5. Load is from 10mA to a maximum of 125mA, and capacitance from 0 to
about 1.5uF.

The problem with this circuit is the output bounces on the falling
edge. Can anybody suggest a fix, or an alternate circuit?

The 200 Ohm resistor to ground doesn't allow it to pull hard to ground.
Can't you do it with a simple push-pull driver?

1.5uF is a pretty stiff load, depending on the transition time you are
trying to achieve.

Regards, Joerg

 

[Winfield Hill]

[email protected] wrote...

Ok, this is the current design of our high side pulse
transmitter we are using. Please view with fixed width font.

VCC
+
|
.-------o------o-----------'
| | | |
.-. | | |
| |2K | | |
| | | 6V | |
'-' | z |/
| |< A .---|
o---o-| | | |>
| |\ | | |
.-. | | | |
| | .------|-----o o------
| |20K | | | |
'-' | .-. | |
| | | | | |<
| | | | ----|
| | '-'200R |\
||-+ .-. | ___ |
||<- | | | .--|___|--|
o----||-+ | | | | 10K .-.
| '-' \| | |||
. 100K | |-' | |
| | <| '-'200R
| | .| |
|-------o------------------|
===
GND

The circuit should have the following features:

1. True logic; high input produces high output, etc.
2. Operates with Vcc from 24V to 50V.
3. High output is slightly less than Vcc, low is better than
6V less than Vcc (exa, Vh = Vcc - 0.5, Vl = Vcc - 6.0)
4. Riseing and falling edges should be as fast as possible.
5. Load is from 10mA to a maximum of 125mA, and capacitance
from 0 to about 1.5uF.

The problem with this circuit is the output bounces on the falling
edge. Can anybody suggest a fix, or an alternate circuit?

100k is a pretty wimpy pulldown for the PNP emitter follower,
and 22k is pretty wimpy for a high-capacitance MOSFET pullup.
I can't make out the rest of the gobbled PNP pulldown circuit,
is that a pulldown current limit? All three point to trouble
with the falling edge.

 

[John Larkin]

[email protected] wrote...

100k is a pretty wimpy pulldown for the PNP emitter follower,
and 22k is pretty wimpy for a high-capacitance MOSFET pullup.
I can't make out the rest of the gobbled PNP pulldown circuit,
is that a pulldown current limit? All three point to trouble
with the falling edge.

It actually looks like positive feedback to me, pseudo-SCR sort of
style. Looks tricky.

I'd vote for complementary mosfets, drains to the output.

We did one version that used some cmos gates as the driver: DC-coupled
directly into the nfet and AC-coupled into the highside pmos gate, and
then added a slow photovoltaic coupler on the high side to make it DC
there, too.

John

 

[Fritz Schlunder]

Ok, this is the current design of our high side pulse transmitter we
are using. Please view with fixed width font.

VCC
+
|
.-------o------o-----------'
| | | |
.-. | | |
| |2K | | |
| | | 6V | |
'-' | z |/
| |< A .---|
o---o-| | | |>
| |\ | | |
.-. | | | |
| | .------|-----o o------
| |20K | | | |
'-' | .-. | |
| | | | | |<
| | | | ----|
| | '-'200R |\
||-+ .-. | ___ |
||<- | | | .--|___|--|
o----||-+ | | | | 10K .-.
| '-' \| | |||
. 100K | |-' | |
| | <| '-'200R
| | .| |
|-------o------------------|
===
GND
(created by AACircuit v1.28.6 beta 04/19/05 www.tech-chat.de)

The circuit should have the following features:

1. True logic; high input produces high output, etc.
2. Operates with Vcc from 24V to 50V.
3. High output is slightly less than Vcc, low is better than 6V less
than Vcc (exa, Vh = Vcc - 0.5, Vl = Vcc - 6.0)
4. Riseing and falling edges should be as fast as possible.
5. Load is from 10mA to a maximum of 125mA, and capacitance from 0 to
about 1.5uF.

The problem with this circuit is the output bounces on the falling
edge. Can anybody suggest a fix, or an alternate circuit?

Jeff Stout

It appears to me the source of your falling edge "bounce" (or rather
undershoot at the output) is caused by the output PNP, positive feedback
NPN, the 200R resistors, and the non idealities of the zener diode. If a
zener diode were ideal, IE: zero internal resistance, perfectly fixed
voltage drop from cathode to anode, then your circuit would probably
function as you want it to.

As it is, regular sized zener diodes have quite a bit of internal effective
series resistance. Depending upon it's size and whatnot, your "6V" zener is
probably more like a 5.7V ideal zener along with along with some series
dynamic resistance (and a parallel capacitance, which isn't too important in
this application). During the turn off transition a significant amount of
peak current must flow through this zener diode in order to halt the output
fall. With the zener diode internal resistance, the anode voltage of the
zener may fall well below Vcc-6V during the high peak zener current turn off
halt event. I think this is the source of your output undershoot.

So how does one improve this?

Well ideally we would know more about exactly what you are driving, because
there may be a better way altogether, and it is possible I don't fully
understand your requirements... However... As it is, I would suggest the
following:

Make the middle 200R resistor much larger. 2k or so would be more
appropriate, this should dramatically decrease the peak current through the
zener at the halting of output turn off, and thus decrease the output
undershoot. Unfortunately, if you grow that 200R resistor to near 2k, that
means the effective pull down strength of your output driver will only be
around one half of what it is now. Right now, you essentially have the 200R
bottom resistor in parallel with the 200R middle resistor for a pull down
resistance of 100R.

So to compensate for this, I would replace the bottom 200R resistor with two
or maybe three silicon diodes in series wired anodes towards the collector
of the output PNP and cathodes towards ground. Then I would shrink the 10k
resistor to something more like 100 ohms. Then I would place a 2k ohm
resistor between base and emitter of that bottom NPN device to improve turn
off performance and insure minimal leakage.

Note that these modifications should increase the peak dissipation
requirements of the output PNP device quite a bit from the way it is now.
As it is now, it appears most of the transient power gets dissipated in the
200R resistors, but my modifications would dump practically all of it into
the PNP device. Therefore, make sure to select a PNP with big enough safe
operating area for this kind of use. Note that the peak pull down
capability is now roughly: (output voltage/2k)*beta of output PNP device.

 

[[email protected]]

I put the 200 Ohm resistor there to limit the current in the output PNP
to about than 250mA. Without that resistor, current throught the
output PNP in some versions of the circuit shoot right pass 2A.

Jeff Stout

 

[Jim Thompson]

I put the 200 Ohm resistor there to limit the current in the output PNP
to about than 250mA. Without that resistor, current throught the
output PNP in some versions of the circuit shoot right pass 2A.

Jeff Stout

You have the current-limit _phasing_ wrong, it's presently positive
feedback ;-)

...Jim Thompson

 

[[email protected]]

Yes, 100K is pretty wimpy. But if the load is purely resistive, then
the load will pull down the output push-pull and the 100K doesn't do
much anyway. If the output is capacitive, then the 100K gets it
started and bottom npn takes over to complete the job. To really be
effective, the 100K resistor would have to be less than 5K and the
static power starts getting too high (> 1/2W) at 50V. I don't like
chewing up that much power in one component in a standby state.

I don't know if 22K is too wimpy. These two resistor switch the high
side input PNP and they perform at an acceptable level (i.e. that PNP
turns off pretty fast). There is room for optimization here, but this
part of the circuit is not the problem.

The problem is the falling edge of the output. I'm trading off speed,
static power, and bounce.

Jeff Stout


Jeff Stout

 

[Fred Bloggs]

Ok, this is the current design of our high side pulse transmitter we

are using. Please view with fixed width font.

VCC
+
|
.-------o------o-----------'
| | | |
.-. | | |
| |2K | | |
| | | 6V | |
'-' | z |/
| |< A .---|
o---o-| | | |>
| |\ | | |
.-. | | | |
| | .------|-----o o------
| |20K | | | |
'-' | .-. | |
| | | | | |<
| | | | ----|
| | '-'200R |\
||-+ .-. | ___ |
||<- | | | .--|___|--|
o----||-+ | | | | 10K .-.
| '-' \| | |||
. 100K | |-' | |
| | <| '-'200R
| | .| |
|-------o------------------|
===
GND
(created by AACircuit v1.28.6 beta 04/19/05 www.tech-chat.de)

The circuit should have the following features:

1. True logic; high input produces high output, etc.
2. Operates with Vcc from 24V to 50V.
3. High output is slightly less than Vcc, low is better than 6V less
than Vcc (exa, Vh = Vcc - 0.5, Vl = Vcc - 6.0)
4. Riseing and falling edges should be as fast as possible.
5. Load is from 10mA to a maximum of 125mA, and capacitance from 0 to
about 1.5uF.

The problem with this circuit is the output bounces on the falling
edge. Can anybody suggest a fix, or an alternate circuit?

Jeff Stout

A fast prototype would look like so. If you want current limit on that
PNP pulldown then add a resistor at its collector:
View in a fixed-width font such as Courier.

 

[Fred Bloggs]

You have the current-limit _phasing_ wrong, it's presently positive
feedback ;-)

...Jim Thompson

Not to mention he will either fry the zener or require a big one that
takes 1.5W. Otherwise positive feedback is conducive to high speed.

 

[Joerg]

Hello Fred,

... Otherwise positive feedback is conducive to high speed.

and to ringing or oscillation ...

Regards, Joerg

 

[[email protected]]

Mark another one up to not enought information. The circuit spends
most of its time in the high state. It transmits a signal between 1200
BAUD, and 9600 BAUD with a duty cycle of less than 10%. But your
right, the current throught the zener is off the scale in some versions
of the circuit.

Jeff Stout

 

[Fred Bloggs]

Mark another one up to not enought information. The circuit spends

most of its time in the high state. It transmits a signal between 1200
BAUD, and 9600 BAUD with a duty cycle of less than 10%. But your
right, the current throught the zener is off the scale in some versions
of the circuit.

Serial interfaces like RS-232 are slew rate limited to 30V/us or less
for EMI reduction and to avoid problems with cable reflections, the
signal is not transmitted with edge rates "as fast as possible." Your
circuit can be boiled down to something like this:
View in a fixed-width font such as Courier.

 

[John Larkin]

Serial interfaces like RS-232 are slew rate limited to 30V/us or less
for EMI reduction and to avoid problems with cable reflections, the
signal is not transmitted with edge rates "as fast as possible." Your
circuit can be boiled down to something like this:
View in a fixed-width font such as Courier.

.
. 24V-48V
. VCC
. +
. |
. +----+--------+-----------+-----------+
. | | | | |
. | | | | .-.
. | | | | 4.7R| |
. | | z | | |
. | | 6.2V A .-. '-'
. | | | | | |
. | .-. | | |220R |/
. 47p| | | | '-' +---| T1
. === | |2.2K | | | |>
. | '-' | | | |
. | | | | | |
. | | +-|>|---+---+-----+ +------>
. | | | | | |
. | - z | | |
. | v 6.2V A | | |<
. | | | | +---| T2
. | | | |< |\
. +----+--------|-----| T3 |
. | | |\ |
. | | | .-.
. | | | __ 12R| |
. | - +--|__|---+ | |
. 5V |/ v 100R | '-'
. CMOS o----| T4 | | |
. |> | |<--+-----+
. | +-------------| T3 |
. | | |\ |+
. | | | ===
. .-. .-. .-. |BFC
. | |1.5K | |1.2K | |Rc |
. | | | | | | |
. '-' '-' '-' |
. | | | |
. +--------+---------------+-------+
. ===
. GND
.

This circuit inverts so precede with a logic inverter to drive T4 for
non-inverting, so much easier than adding discretes. T3 maintains a
reference 12V below the Vcc so that the T2 pulldown is presented with a
constant voltage regardless of Vcc level. You can almost use the Zetex
E-line ZTX855/ZTX955 in TO-92 for T1/T2 but that will depend upon the
environment and board construction. There is no short-circuit
protection, short it and it blows up. So that's something else to consider.

Isn't this getting a little crazy and component-rich? You can do the
whole thing with 5 parts. Or maybe less.

John

 

[Fred Bloggs]

Isn't this getting a little crazy and component-rich? You can do the
whole thing with 5 parts. Or maybe less.

John

Nah- I need to add even more parts to charge that BFC at turn-on:
View in a fixed-width font such as Courier.

 

[[email protected]]

I simulated your circuit and I can get it to produce perfect square
waves. I had to balance the top 200R and the bottom 200R resistors and
make a few other gratuitous changes. But God, it produces some
beautiful output.

However, if I change the load or the source voltage the output is not
so perfect. I tried to find a flat middle ground which would give
acceptable performace; but I gave up.

Thanks anyway for the circuit.

Jeff Stout

 

[[email protected]]

VCC
+
|
.-------o------o-----------'
| | | |
.-. | | |
| |2K | | |
| | | 6V | |
'-' | z |/
| |< A .---|
o-----| | | |>
| |\ | | |
.-. | | | |
| | o------o--o--o o------
| |20K | | | |
'-' .-)----. .-. | |
| | | | | | | |<
o-----' | .-. | | '---|
| | | | '-' |\
||-+ .-. | | | 50R |
||<- | | '-'20K| |
o----||-+ | | | | .-.
| '-' | |/ | |
| 100K | '--| | |
| | |> '-'200R
| | | |
.-------o---------o--------|
===
GND
(created by AACircuit v1.28.6 beta 04/19/05 www.tech-chat.de)


Ok, I punted. I routed the NPN to the input. It pulls a lot of
current in the low state, but I can live with that until I find a
better solution.

Thank you to all who tried to help.

Jeff Stout

 

[Fred Bloggs]

I simulated your circuit and I can get it to produce perfect square

waves. I had to balance the top 200R and the bottom 200R resistors and
make a few other gratuitous changes. But God, it produces some
beautiful output.

However, if I change the load or the source voltage the output is not
so perfect. I tried to find a flat middle ground which would give
acceptable performace; but I gave up.

You're not grown up enough to get that circuit to work. Other simpler
circuits absent feedback were posted in the same thread, but apparently
you're not conscious enough to see them.

 

[[email protected]]

I DID see other circuits in the thread, but I did not have time to look
and play with them. I had to ship the project last Friday and did not
have time to play around. But I assure you I will eventually examine
all replies for their technical merits.

As for my maturity, you may be right. But if one were to compare your
rant and this reply, I don't think you would win the maturity prize.
But I have sometimes observed that maturty and technical ability have
little to do with each other.

Thank you for your help.

Jeff Stout

 

[John Larkin]

Nah- I need to add even more parts to charge that BFC at turn-on:
View in a fixed-width font such as Courier.

.
. 24V-48V
. VCC
. +
. |
. +----+--------+-------+------+-----------+
. | | | | | |
. | | | | | .-.
. | | | | | 4.7R| |
. | | z | | | |
. | | 6.2V A .-. .-. '-'
. | | | | | | | |
. | .-. | 100K| | | |220R |/
. 47p| | | | '-' '-' +---| T1
. === | |2.2K | | | | |>
. | '-' | | | | |
. | | +-|>|----------+-----+ +------>
. | | | | | | |
. | - z | | | |
. | v 6.2V A | | | |<
. | | | | |< +---| T2
. +----+--------|------------| T5 |\
. | | | |\ |
. | - | | |
. | v | .-. |
. | | | 100R| | .-.
. | | | | | 12R| |
. | | | '-' | |
. 5V |/ | | | '-'
. CMOS o----| T4 | +------+ |
. |> | - | |
. | | ___ ^ |<---+-----------+
. | +-|___|-+-| T3 |
. | | 470R |\ |+
. | | | ===
. .-. .-. .-. |BFC
. | |1.5K | |1.2K | |Rc |
. | | | | | | |
. '-' '-' '-' |
. | | | |
. +--------+-----------+--------------+
. ===
. GND

What did you have in mind? A switching regulator -12V from the Vcc and a
RS-232 driver with GND referenced logic coupled in?

Pulldown nfet, directly driven from the input. Pullup pfet, ac coupled
(that should be ok here, with low duty cycle). Pfet drive is just a
cap, a zener s-g, and a resistor g-gnd. OK, maybe add a resistor in
the pfet drain for powerup shoot-thru and short-circuit protection.

For one more part, you can dc-couple the whole thing.


You could almost do it with one spdt opto-solid-state relay, but
they're a tad slow.


John