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Help with HSPICE subcircuit

Discussion in 'CAD' started by Patrick, Mar 13, 2005.

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  1. Patrick

    Patrick Guest

    i'm new to hspice and i'm trying to make a 2-input NAND gate
    subcircuit so that i can go on to simulate more complex circuits using
    this NAND gate. i wrote a short netlist just to test my NAND gate
    subcircuit (shown below). i basically tied one input to +5V and put a
    clock signal into the other input.
    whenever i run the simulation, i get a "hspice job aborted" message
    because of some error. i have no idea what i'm doing wrong. i included
    the two model files (nmos.spi and pmos.spi) in my working directory
    and i've successfully used these models before for other simpler
    simulations (without any subcircuits). i would greatly appreciate any
    help i can get. thanks in advance,
    patrick antoun

    NAND Gate Trial
    ..TRAN 200P 42N

    *INPUT B------------| |
    *INPUT A----------| | |
    *GND------------| | | |
    *VDD----------| | | | |
    ..SUBCKT 2NAND 1 2 3 4 6
    M1 6 3 1 1 PCH L=1U W=20U
    M2 6 4 1 1 PCH L=1U W=20U
    M3 6 3 5 5 NCH L=1U W=20U
    M4 5 4 2 2 NCH L=1U W=20U
    ..ENDS 2NAND

    VDD VDD 0 5
    VA A 0 5
    VCLK B 0 0 PULSE 0 5 1F .1N .1N 10N 21N
    X1 VDD 0 A B OUT 2NAND


  2. Jim Thompson

    Jim Thompson Guest

    It's probably throwing up on the DELAY term in the Pulse description,
    1F = 1 femto-second, 1e-15

    Make it perhaps 1N, or 0 (zero)

    If you have a model "card" you don't have to describe the model again
    from within the subcircuit.

    In the "real world" CMOS is (usually) P-type substrate. This means
    the bodies of the NMOS must connect to ground. (There are dual-well
    processes, but not usually found in a student environment :)

    ...Jim Thompson
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