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Help with 74LS373N latch (Supernoob)

Discussion in 'General Electronics Discussion' started by Marc Mello, Nov 22, 2014.

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  1. Marc Mello

    Marc Mello

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    Nov 22, 2014
    Hello everyone

    I am making a simple program that reads data from a computer and stores it onto an EEPROM.

    Anyway, for some reason I can't figure out how to properly latch data inputs to the LS373N. I made a small test circuit with two LEDS connected to Q1 and Q2. All I am trying to do is send inputs to D1 and D2 to make sure that the Q1 and Q2 match D1 and D2.

    According to the data sheet, when g(enable) is HIGH and OC is LOW, inputs should match the outputs. However I am not getting this result. I have tried every combination of OC and g in order to see outputs matching the inputs. Nothing works.

    I am not sure what OC( actually does) and when I ground my OC, the LEDS turn ON regardless of the input status on the D's.

    Any help would be much appreciated!!
    Datasheet Link

    Thanks in advance

    Marc

    PS. Meant D*M74LS373N in title
     
  2. Arouse1973

    Arouse1973 Adam

    5,165
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    Dec 18, 2013
    Can we see your circuit?
    Thanks
    Adam
     
  3. KrisBlueNZ

    KrisBlueNZ Sadly passed away in 2015

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    Nov 28, 2011
    The 373 is pretty straightforward and should behave like you want.

    The OC input is "output control" and must be low to enable the outputs. If it's high, the outputs go "tri-state", i.e. they float, and won't drive anything.

    The 373 is a transparent latch. While the G input is high, the outputs follow the inputs (assuming OC is low).

    You need to drive all of the input pins with clearly defined logic levels. The inputs will pull themselves high if they're not driven, i.e. floating. So if you've connected the inputs to switches from VCC, the 373 will think the inputs are high even when the switches are OFF, because when the inputs are undriven, they float high. That may be your problem. Try connecting the switches to GND instead, with a pullup resistor (e.g. 4k7) from each input to VCC. When the switch is closed, the input is pulled to GND, i.e. low. When the switch is open, the pullup resistor pulls it high.

    Edit: Oh, and welcome to Electronics Point :)
     
  4. Marc Mello

    Marc Mello

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    Nov 22, 2014
    OK thank you I am starting to see what you are saying. Ground drives a LOW. For some reason I figured no input would = LOW.

    Thanks for clearing up my headache,

    Now I have just one simple question. I will be driving my inputs from the pins of an IDC connector. So if I send a data byte 01010101 to my pins which connect to my latch inputs, I am assuming that since the connector is also grounded, the 0's will be sent as ground and thus it will drive it the inputs with data bits 0 LOW?

    Thanks again. This really helped
     
  5. Marc Mello

    Marc Mello

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    Nov 22, 2014
    Thanks for your response! I have a schematic of my circuit but I was just having trouble understanding the IC as I couldn't drive the inputs properly. If I run into more problems with the circuit, I will surely ask you guys, and post the schematic. Thanks!
     
  6. KrisBlueNZ

    KrisBlueNZ Sadly passed away in 2015

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    No, you always have to provide a signal level. Don't rely on the inputs floating to any particular state, because they usually don't. TTL/LS is the exception; it's an old logic family, and its inputs float high, which is not what you might expect, and it's the reason that you should connect the switches to GND and use a pullup resistor - because with TTL/LS, you need to pull the inputs strongly to GND to make them low.

    With other logic types, including 74HC versions of TTL/LS devices, inputs don't float either way, and you can use switches to GND and pullup resistors, or switches to VCC with pulldown resistors.
    Yes, as long as the 0V/GND rails of the driving circuit and the receiving circuit are connected together, and the driving circuit uses 0V/5V levels and asserts both states. What is the driving circuit?
     
  7. Marc Mello

    Marc Mello

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    Nov 22, 2014
    Wow, thanks for this knowledge again.

    I'm not sure exactly what "Drives" it but basically I have a program that reads a file and with addresses/data. It reads the address and sends it through the pins of the IDC to be latched to a ls373n, which goes to an EEPROM. Then the next line in the file is the data which goes to a different ls373n to be latched and send to the EEPROM. So the two 8 bit latches read data from the same pins on the IDC and thus are time multiplexed to the EEPROM. I'm not sure if I explained it correctly but that is the gist of my project.
     
  8. KrisBlueNZ

    KrisBlueNZ Sadly passed away in 2015

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    Yes, I understand. As long as the circuitry that is driving the signals on the IDC uses 5V logic levels you should be OK.

    Edit: Is there a specific reason why you're using 74LS373s instead of 74HC373s?
     
  9. Marc Mello

    Marc Mello

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    Nov 22, 2014
    Not sure what the difference is?(I told you I'm a noob haha) I'm going to guess a different type of transistor design and better performance?

    I am using a 74LS373n simply because this is for a final project in my intro to embedded systems undergrad class. We were given a kit of IC's and we have to use the one's provided :(
     
  10. (*steve*)

    (*steve*) ¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd Moderator

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    Jan 21, 2010
    Don't worry. LSTTL is harder to break due to poor handling :)
     
    Marc Mello and KrisBlueNZ like this.
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