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Help to create a circuit to prevent register loss on temporary voltage drops.

Discussion in 'Microcontrollers, Programming and IoT' started by LearningSomethingToday, Apr 14, 2018.

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  1. LearningSomethingToday

    LearningSomethingToday

    23
    0
    Mar 4, 2018
    I am working on a very old parametric equalizer which utilizes two Rockwell R6500/1 single chip computers (1 per stereo channel).
    The Rockwells are used to form the user interface and switch various banks of filters, that ultimately shape the sound produced.
    It was state of the art when introduced but by today's standards has some flaws in its design.
    There is a working register and 9 additional "save" registers that can be used to recall settings, update the display and update the switching matrix. The Rockwell chips receive 5V on VCC all the time, even when the unit is powered off (stand-by).
    Unfortunately there is no battery backup for the RAM, which is unfortunate because the Rockwell 6500 supports battery back-up for RAM.
    In the circuit the battery function is not used and the battery line VRR (Pin1) is tied to the 5v VCC pin (Pin30). The are some small value decoupling caps on pin 1 and 30.
    The lack of even a decent capacitor to hold the registers during a very short power outage causes a great deal of aggravation.
    The power supply has some reserve capacity but is quickly drained under the load of the 2 Rockwells and other supporting chips.
    I thought I could just find a 5V source to isolate and keep the VRR line alive but the Rockwell has some tricks up it sleeve. Apparently the program running on it must be "power failure aware" on a pin and an interrupt routine must be called to quickly write registers to RAM just before dying. This is per the Rockwell documentation. I have included a snippet of their text at the bottom of this thread. I am fairly certain these types of routines would not have been part of the original design. So I think my only option at this time is to use something like a supercap or battery to keep the entire chip alive during brief power outages. Here is a pic of the circuit:

    EQ.jpg

    5.3 RAM DATA RETENTION — VRR REQUIREMENTS

    For the RAM to retain data upon loss of V CC, VRR must
    be supplied within operating range and RES must be driven
    low at least eight 02 clock pulses before VCC falls out of
    operating range. RES must then be held low while VCC is
    out of operating range and until at least eight 02 clock
    cycles after VCC is again within operating range and the
    internal 02 oscillator Is stabilized. VRR must remain within
    VCC operation range during normal R6500/1 operation.
    When VCC is out of operating range, VRR must remain
    within the VRR retention range in order to retain data.

    Is there something safe I can insert to get some relief? How about replacing the decoupling caps with super-caps? Any other ideas?
     
  2. kellys_eye

    kellys_eye

    4,276
    1,146
    Jun 25, 2010
    Look at the circuits surrounding NVRAM used in all PC's (BIOS) - it comprises a simple battery and diode(s) that both charge the battery (in some cases) and provide the necessary standby current when powered down.
     
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