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help on ADC0809

Discussion in 'Electronic Design' started by [email protected], Mar 14, 2007.

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  1. Guest

    This one is a problem that I have encountered and I thought someone
    might be able to help.

    I interfaced a ADC0809 with the parallel port of the computer working
    with operating system Win98. The start of conversion (SOC) pulse is
    sent by the program which then waits for the End of conversion (EOC)
    from the ADC. When the ADC responds with EOC, the 8 bit data is read.

    So far so good. Now if the program is put into a loop a 50ms delay has
    to be given before sending the second SOC. If less delay is given the
    data given by the ADC is zero. If 50ms delay is given the card
    sine, trianglur and square waves very well of frequency 1-2Hz.

    (50ms delay corresponds to 20Hz sampling and since I demanded 10 data
    per cycle, I capture 2Hz waves)

    Datasheet of ADC0809 says this delay is not required and the sampling
    frequency is 100KHz. However, I dont get this. I wrote to National
    semiconductors and they are of no help. After initial enquiries when
    they realised trouble, they just stopped communicating.

    I have looked up the net and dont see anyone else talking of this
    So please help!!!!

    Best if you mail it at or/and

    bye for now
  2. Guest

    Please describe your conversion clock input to the chip.
  3. Rich Grise

    Rich Grise Guest

    We don't send answers by email. If you could bother to find the NG to post
    the question, you can bother to find the NG again to look for answers.

    Good Luck!
  4. It may depend on how you are implementing the 50 mSec delay. The internal
    timer of a PC is just about 50 mSec, so you may have granularity issues.
    Please respond to the NG postings so all may learn.

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