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Help me pull this oscillator!

P

Paul Burridge

Jan 1, 1970
0
Hi,

This is the sweep oscillator that Frank Rafaelli kindly designed for
me. I'm going to have one last bash at trying to pull its output
frequency up as far as possible before giving up and going for a
redesign.

Here's Frank's original circuit:

(View in courier font)




TC7SU04F
47pF unbuffered inv.
varactor1 varactor2
|| |\
+--------+----------+-----||-----+-----|->O-------+--- output
| | | || | |/ |
| .-. .-. | |
| | | | | | |
GND 27k| | 27k| | | |
'-' '-' | |
| | | ___ |
| GND +-----|___|------+
DC control---+ | 470k |
| | |
| | .-.
22nF--- | | |
--- | | |1.5k
| | 8Mhz '-'
GND | ceramic res. |
| _ |
| | | |
+-----|| ||------+
| |_| |
| |
--- ---
8pF --- --- 47pf variable
| |
GND GND


To maximise the upward pull, | need to eliminate as much capacitance
(circuit and stray) as humanly possible. The resonator still seems
stable with just two 3.3pF caps in place of the current 8 and 47
shown. Do the resistor values have any bearing on the frequeny or not?
Would reducing the value of the 47pF coupling cap assist? What about
the 22nF?? Any constructive suggestions, please!
 
J

Jim Thompson

Jan 1, 1970
0
Hi,

This is the sweep oscillator that Frank Rafaelli kindly designed for
me. I'm going to have one last bash at trying to pull its output
frequency up as far as possible before giving up and going for a
redesign.

Here's Frank's original circuit:

(View in courier font)




TC7SU04F
47pF unbuffered inv.
varactor1 varactor2
|| |\
+--------+----------+-----||-----+-----|->O-------+--- output
| | | || | |/ |
| .-. .-. | |
| | | | | | |
GND 27k| | 27k| | | |
'-' '-' | |
| | | ___ |
| GND +-----|___|------+
DC control---+ | 470k |
| | |
| | .-.
22nF--- | | |
--- | | |1.5k
| | 8Mhz '-'
GND | ceramic res. |
| _ |
| | | |
+-----|| ||------+
| |_| |
| |
--- ---
8pF --- --- 47pf variable
| |
GND GND


To maximise the upward pull, | need to eliminate as much capacitance
(circuit and stray) as humanly possible. The resonator still seems
stable with just two 3.3pF caps in place of the current 8 and 47
shown. Do the resistor values have any bearing on the frequeny or not?
Would reducing the value of the 47pF coupling cap assist? What about
the 22nF?? Any constructive suggestions, please!

My experience (on a commercial product this past year) is that you get
better pulling by varying the right-hand capacitance... 100-200ppm.

...Jim Thompson
 
A

analog

Jan 1, 1970
0
Paul said:
This is the sweep oscillator that Frank Rafaelli kindly designed for
me. I'm going to have one last bash at trying to pull its output
frequency up as far as possible before giving up and going for a
redesign.

Here's Frank's original circuit:

Do you know why the second varactor is in series with the gate's
input?
(View in courier font)

TC7SU04F
47pF unbuffered inv.
varactor1 varactor2
|| |\
+--l>|---+----|<l---+-----||-----+-----|->O-------+--- output
| | | || | |/ |
| .-. .-. | |
| | | | | | |
GND 27k| | 27k| | | |
'-' '-' | |
| | | ___ |
| GND +-----|___|------+
DC control---+ | 470k |
| | |
| | .-.
22nF--- | | |
--- | | |1.5k
| | 8Mhz '-'
GND | ceramic res. |
| _ |
| | | |
+-----|| ||------+
| |_| |
| |
--- ---
8pF --- --- 47pf variable
| |
GND GND

To maximise the upward pull, I need to eliminate as much capacitance
(circuit and stray) as humanly possible. The resonator still seems
stable with just two 3.3pF caps in place of the current 8 and 47
shown. Do the resistor values have any bearing on the frequeny or not?
Would reducing the value of the 47pF coupling cap assist? What about
the 22nF?? Any constructive suggestions, please!

Do you have the varactors and resonator yet and/or know their part
numbers? What is the desired range over which you wish to be able to
pull the frequency of oscillation? Why an 8 MHz resonator (weren't you
just hobbying about with stuff at around 40 MHz)? What is the ultimate
goal of this circuit?

With a little more information I could probably run a complete check
of this design and give suggestions to optimize it if needed.
The BBC: Licensed at public expense to spread lies.

Wouldn't doubt that at least some of what they promote is deliberate,
deceitful propaganda. What did you have in mind?
 
P

Paul Burridge

Jan 1, 1970
0
My experience (on a commercial product this past year) is that you get
better pulling by varying the right-hand capacitance... 100-200ppm.

Yes, that's what I've found, too. But I get to 3.3pF for both R&L and
I don't think I can reasonable pull it any more in that area without
it becoming flakey. John Larkin reckons these things can be pulled by
a percent or more which would be great but I simply can't see it
somehow. I've already decided I'll probably need to parallel two
resonators up *and* bung in a series inductor as well. Every little
counts!
 
P

Paul Burridge

Jan 1, 1970
0
Do you know why the second varactor is in series with the gate's
input?

Hi, Analogue.
No I don't TBH. This config of cathode-to-cathode varactors is very
common, I've noticed and I'm curious to learn more about why this is
so. If you know the ins and outs of this form of Pierce then *please*
expound!
Do you have the varactors and resonator yet and/or know their part
numbers? What is the desired range over which you wish to be able to
pull the frequency of oscillation? Why an 8 MHz resonator (weren't you
just hobbying about with stuff at around 40 MHz)? What is the ultimate
goal of this circuit?

Yes, I've got the bits but the resonators' part number is not-known. I
imagine they're probably Murata; in any event they're the
two-terminal, dipped type. As for the diodes, Frank's design calls for
BB914s, but I couldn't source them so am using BB149 as they have the
largest ratios I could source here. I also have some BBY40s which are
higher capacitance and lower V/C ratio.

Further info: the output is to be fed into a 5X multiplier to get into
the 40Mhz band. The varactors have to sweep the (final) output between
(preferably) 40.5 and 41Mhz; or if not, 40.6 and 41Mhz would probably
suffice...

I can get quartz crystals made up for the exact frequency for the
midband (40.750/5=8.15Mhz) but they won't pull much; nence the need
for a nice "rubbery" ceramic resonator.
With a little more information I could probably run a complete check
of this design and give suggestions to optimize it if needed.

That would be great, thanks!
Wouldn't doubt that at least some of what they promote is deliberate,
deceitful propaganda. What did you have in mind?

Every organisation is political to some extent. I just object to being
forced under threat of imprisonment to pay good money to provide a
platform for someone else's political views.

Regards,

p.
 
J

Jan Panteltje

Jan 1, 1970
0
On a sunny day (Sat, 07 Feb 2004 23:35:51 +0000) it happened Paul Burridge
<[email protected]>:

+5
|
1 to +5 V 33p |--
--====------------||---------->| BF254
| | | |--
=== | === 100p|--------------to HCT smith trigger input
/ \ vari- L1 |----- |
| cap === |
| 30-200p | |220p | | 1k
| | | |
-------------------------------------------- GND

OK, how is this for component count?
You probably know the formula for f versus L and C to calculate L1,
20 turns 0.3 mm wire with an adjustable core is my estimate..
Use zero temp coeff. for the caps.
Thse are high capacitance varicaps, I could look up what is written
on it if needed.
You can tune (shift) MHz if needed.

Copyright Usenet patent 00000001 hex
 
P

Paul Burridge

Jan 1, 1970
0
On a sunny day (Sat, 07 Feb 2004 23:35:51 +0000) it happened Paul Burridge
<[email protected]>:

+5
|
1 to +5 V 33p |--
--====------------||---------->| BF254
| | | |--
=== | === 100p|--------------to HCT smith trigger input
/ \ vari- L1 |----- |
| cap === |
| 30-200p | |220p | | 1k
| | | |
-------------------------------------------- GND

OK, how is this for component count?
You probably know the formula for f versus L and C to calculate L1,
20 turns 0.3 mm wire with an adjustable core is my estimate..
Use zero temp coeff. for the caps.
Thse are high capacitance varicaps, I could look up what is written
on it if needed.
You can tune (shift) MHz if needed.

Thank, Jan. The problem here is that there's likely to be drift owing
to no xtal. I can't afford to risk drifting out of band so this type
of arrangement is - whilst tempting as an unquestionable quick fix -
not feasible for my purposes, I'm afraid.
 
J

Jan Panteltje

Jan 1, 1970
0
Thank, Jan. The problem here is that there's likely to be drift owing
to no xtal. I can't afford to risk drifting out of band so this type
of arrangement is - whilst tempting as an unquestionable quick fix -
not feasible for my purposes, I'm afraid.
I would help ++ if you explained what you wanted it to do eh, use it for.
Makes little sense to me you say +-35kHz shift, this thing will not drift
that much at all.
I have used exactly this circuit locked to a ref freq (in PLL 16 x!) as color
reference 4.9 MHz here even a few degrees phase error cause problems.
And that was in 1973, using a normal transistor.
Dunno what you want to do.
 
J

John Larkin

Jan 1, 1970
0
Thank, Jan. The problem here is that there's likely to be drift owing
to no xtal. I can't afford to risk drifting out of band so this type
of arrangement is - whilst tempting as an unquestionable quick fix -
not feasible for my purposes, I'm afraid.

Watch out for the tc of the varicap itself. They are terrible, and the
temperature contribution of the varicap will vary with the control
voltage, so it's nasty to try to compensate.

DDS chips take most the challenge out of this.

John
 
P

Paul Burridge

Jan 1, 1970
0
I would help ++ if you explained what you wanted it to do eh, use it for.
Makes little sense to me you say +-35kHz shift, this thing will not drift
that much at all.
I have used exactly this circuit locked to a ref freq (in PLL 16 x!) as color
reference 4.9 MHz here even a few degrees phase error cause problems.
And that was in 1973, using a normal transistor.
Dunno what you want to do.

Well, the eventual aim does appear here elsewhere, but in summary,
it's to produce a circuit that can provide an output sweep frequency
(by means of a 1 - 10V max. dc control voltage) of between 40.5Mhz and
41Mhz. at a level of around 300mV p-p into 50 ohms. I need to be able
to get up to 40.995Mhz *but not beyond 41Mhz* hence the belief that a
relaxation oscillator will not be accurate enough. I trust this
clarifies matters.
Thanks for your interest...
 
A

analog

Jan 1, 1970
0
Yes, I've got the bits but the resonators' part number is not-known.
I imagine they're probably Murata; in any event they're the two-
terminal, dipped type. As for the diodes, Frank's design calls for
BB914s, but I couldn't source them so am using BB149 as they have
the largest ratios I could source here. I also have some BBY40s
which are higher capacitance and lower V/C ratio.

Further info: the output is to be fed into a 5X multiplier to get
into the 40Mhz band. The varactors have to sweep the (final) output
between (preferably) 40.5 and 41Mhz; or if not, 40.6 and 41Mhz would
probably suffice...

I can get quartz crystals made up for the exact frequency for the
midband (40.750/5=8.15Mhz) but they won't pull much; nence the need
for a nice "rubbery" ceramic resonator.

Okay, Paul, try this:

varactor *buffered*
BBY40 100pF inverter
6 to 45pF || |\
+--->|---+---||---+-----| >O----+--- output
| | || | |/ |
GND .-. | ___ |
| | +----|___|----+
| | 10M | 10M |
'-' | .-.
| | ceramic | |
DC control --+ | resonator | | 100k
0-15V | | _ '-'
--- | | | |
--- u10 +----|| ||----+
| |_| |
GND ---
8MHz --- 100pF
|
GND

The capacitance shown for the BBY40 is the typical range taken from
the data sheet curves (.8V to 15V). I am suggesting you use a normal,
*buffered* gate in order to keep the ac signal on the input of the
gate from modulating the control voltage on the varactor. As I
recall, a buffered gate should have a gain of around 60dB or more
(1000x) in the linear mode. Unfortunately, gain can vary with all
sorts of things, temperature, operating voltage and even manufacturer.

The 100k resistor coming from the output of the gate forms a voltage
divider with the 100pF capacitor it feeds. It serves both to provide
phase shift and control loop gain. Be prepared to lower its value if
the circuit does not start or raise its value if the oscillations are
not clean or lock onto spurious modes (my guess as to gate gain is
just that - only a guess).

According to Murata the 10M dc biasing resistor across the gate may
not be needed because the leakage across the resonator is usually
sufficient for that purpose. Whatever you do, just be sure not to
go below about 4.7M for either the gate bias or the control bias
resistors as doing so erodes oscillator Q and narrows the control
range. Control range, by the way, should be 1.5 to 2 times greater
than you were asking for (~900kHz referred to 40MHz).

Here is the LTspice simulation file for your circuit.
(As usual, beware inadvertent line wrap.)

____________Ceramic_Resonator.asc______________

Version 4
SHEET 1 1588 680
WIRE 576 256 608 256
WIRE 720 256 736 256
WIRE 288 256 320 256
WIRE 176 112 320 112
WIRE 768 112 768 256
WIRE 608 336 608 368
WIRE 368 256 352 256
WIRE 464 256 448 256
WIRE 496 256 464 256
WIRE 608 272 608 256
WIRE 608 256 640 256
WIRE 768 448 768 480
WIRE 768 384 768 368
WIRE 768 272 768 256
WIRE 176 256 176 112
WIRE 208 256 192 256
WIRE 768 368 816 368
WIRE 768 368 768 336
WIRE 976 368 976 384
WIRE 976 464 976 480
WIRE 928 368 960 368
WIRE 640 256 656 256
WIRE 736 256 768 256
WIRE 816 368 848 368
WIRE 960 368 976 368
WIRE 320 144 320 112
WIRE 320 112 768 112
WIRE 320 256 320 224
WIRE 320 256 352 256
WIRE 192 256 176 256
FLAG 608 368 0
FLAG 352 256 1
FLAG 464 256 2
FLAG 640 256 3
FLAG 768 480 0
FLAG 976 480 0
FLAG 736 256 4
FLAG 816 368 5
FLAG 960 368 6
FLAG 192 256 4
SYMBOL Misc\\xtal 720 240 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 Invisible 0
SYMATTR InstName Y1
SYMATTR Value 6p
SYMATTR SpiceLine Rser=7 Lser=74u Rpar=1e8 Cpar=33p
SYMBOL cap 592 272 R0
WINDOW 0 40 24 Left 0
WINDOW 3 40 47 Left 0
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL voltage 352 256 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 -60 56 VBottom 0
WINDOW 123 -32 56 VBottom 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL res 592 240 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL varactor 752 448 M180
WINDOW 0 40 32 Left 0
WINDOW 3 40 9 Left 0
SYMATTR InstName D1
SYMATTR Value {C}
SYMATTR Prefix C
SYMATTR SpiceLine Rser=5
SYMBOL cap 752 272 R0
WINDOW 0 40 24 Left 0
WINDOW 3 40 48 Left 0
SYMATTR InstName C2
SYMATTR Value 100p
SYMBOL Misc\\EuropeanResistor 192 272 R270
WINDOW 0 27 56 VTop 0
WINDOW 3 5 56 VBottom 0
SYMATTR InstName U1
SYMATTR Value Gate
SYMATTR Prefix X
SYMBOL voltage 976 368 R0
WINDOW 0 40 48 Left 0
WINDOW 3 41 72 Left 0
SYMATTR InstName V2
SYMATTR Value 2.52
SYMBOL res 944 352 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 10Meg
SYMBOL res 336 240 R180
WINDOW 0 36 76 Left 0
WINDOW 3 36 40 Left 0
SYMATTR InstName R3
SYMATTR Value 10Meg
TEXT 168 16 Left 0 !.step param C list 6p 45p
TEXT 168 48 Left 0 !.tran 0 .3m 0 .1u uic
TEXT 168 -16 Left 0 !.param C=31p
TEXT 176 336 Left 0 !.SubCkt Gate 1 2\nV1 3 0 2.5V\nG1 2 0 1 3 100\nD1 0 2 clamp\n.model clamp D( Ron=0 Roff=10 Vfwd=0 Vrev=5)\n.ends
TEXT 960 336 Bottom 0 ;Control\nVoltage\n0-15V
TEXT 792 464 Left 0 ;BBY40
TEXT 168 80 Left 0 !.ac lin 1000 7e6 9e6
TEXT 520 -8 Left 0 ;for Loop Gain\n(ac analysis)\nplot V(1)/V(2)
 
P

Paul Burridge

Jan 1, 1970
0
Okay, Paul, try this:

varactor *buffered*
BBY40 100pF inverter
6 to 45pF || |\
+--->|---+---||---+-----| >O----+--- output
| | || | |/ |
GND .-. | ___ |
| | +----|___|----+
| | 10M | 10M |
'-' | .-.
| | ceramic | |
DC control --+ | resonator | | 100k
0-15V | | _ '-'
--- | | | |
--- u10 +----|| ||----+
| |_| |
GND ---
8MHz --- 100pF
|
GND


Thank, Analog. I'm going to breadboard this later 2day, but in the
mean time there are a few questions that arise about the LT spice
simulation I've run from your asc. file...
____________Ceramic_Resonator.asc______________
[snip]

1. You've modelled the resonator as a capacitor which i understand to
be a common method of modelling xtals as well. However, AIUI (with
respect to crystals) the characteristic of these parts are a) *very*
high inductance of several Henrys, and b) *very* small motional
capacitance of typically a couple of femtofarads. Your values are very
much less extreme. Is this more closely representative of a ceramic
device?

2. The resonance point in the .ac analysis doesn't shift as one would
expect with the application of different control voltages to the
varactor. Is there something I'm missing here? There doesn't seem to
be any model parameters for the varactor...

3. There's no model statement for the gate, either, so how is it
supposed to represent a real-world device?

Your very much more advanced knowledge of LT probably leads you to
beleive that these are seriously *dumb* questions, but *please* put
me out of my misery and address the above points!
Many thanks,

p.
 
A

analog

Jan 1, 1970
0
Okay, Paul, try this:

varactor *buffered*
BBY40 100pF inverter
6 to 45pF || |\
+--->|---+---||---+-----| >O----+--- output
| | || | |/ |
GND .-. | ___ |
| | +----|___|----+
| | 10M | 10M |
'-' | .-.
| | ceramic | |
DC control --+ | resonator | | 100k
0-15V | | _ '-'
--- | | | |
--- u10 +----|| ||----+
| |_| |
GND ---
8MHz --- 100pF
|
GND

Thank, Analog. I'm going to breadboard this later 2day, but in the
mean time there are a few questions that arise about the LT spice
simulation I've run from your asc. file...
____________Ceramic_Resonator.asc______________

[snip]

1. You've modelled the resonator as a capacitor which i understand to
be a common method of modelling xtals as well. However, AIUI (with
respect to crystals) the characteristic of these parts are a) *very*
high inductance of several Henrys, and b) *very* small motional
capacitance of typically a couple of femtofarads. Your values are
very much less extreme. Is this more closely representative of a
ceramic device?

Yes, check out:
http://www.semiconductors.philips.com/acrobat/applicationnotes/AN97090_1.pdf
2. The resonance point in the .ac analysis doesn't shift as one would
expect with the application of different control voltages to the
varactor. Is there something I'm missing here? There doesn't seem to
be any model parameters for the varactor...

If you right click on the varactor symbol you will find that it has
been co opted and relabeled to appear as a plain capacitor to the
simulator. Its value is changed by the .step parameter command.
It does not respond to voltage change (wouldn't be too hard to do
so via a model statement, but that part of the problem is somewhat
beside the main point - I just wanted to use the graphic symbol).
3. There's no model statement for the gate, either, so how is it
supposed to represent a real-world device?

Again I just borrowed LTspice's European resistor symbol and edited
its fields to use it as a simplified, idealized gate. That is what
the subcircuit text is for. I wanted the simulation file to be
completely self contained (not require additional files).
 
J

Jim Thompson

Jan 1, 1970
0
[snip]
Okay, Paul, try this:

varactor *buffered*
BBY40 100pF inverter
6 to 45pF || |\
+--->|---+---||---+-----| >O----+--- output
| | || | |/ |
GND .-. | ___ |
[snip]

Why the "buffered" inverter? Just trying to be obstinate ?:)

...Jim Thompson
 
P

Paul Burridge

Jan 1, 1970
0

Thanks, I will. Ken Burch kindly e-mailed me today with four models
for the different types of Murata 8Mhz resonator and I noted that the
values therein where pretty close to those you'd used.
If you right click on the varactor symbol you will find that it has
been co opted and relabeled to appear as a plain capacitor to the
simulator. Its value is changed by the .step parameter command.
It does not respond to voltage change (wouldn't be too hard to do
so via a model statement, but that part of the problem is somewhat
beside the main point - I just wanted to use the graphic symbol).

Thanks for the clarification. In that case it looks like it's showing
just over 8.2Mhz with a varactor value of 6pF. I've dead-bugged the
circuit this afternoon but can't yet get down to 6pF owing to lack of
voltage swing on the control voltage thus far.
Here's the relationship in practice:

rV applied Frequency (Mhz)

0 8.0026
1 8.013
2 8.030
3 8.049
4 8.062
5 8.074
6 8.084
7 8.094
8 8.098
9 8.102
10 8.107

I just can't help thinking that it's not going to reach 8.2Mhz without
something closer to -24V on the control. :-( Still, if the worst comes
to the worst, 24 volts *is* available, at a pinch.
Again I just borrowed LTspice's European resistor symbol and edited
its fields to use it as a simplified, idealized gate. That is what
the subcircuit text is for. I wanted the simulation file to be
completely self contained (not require additional files).

Thanks for the explanation.
 
A

analog

Jan 1, 1970
0
Paul said:
Thanks for the clarification. In that case it looks like it's showing
just over 8.2MHz with a varactor value of 6pF. I've dead-bugged the
circuit this afternoon but can't yet get down to 6pF owing to lack of
voltage swing on the control voltage thus far.
Here's the relationship in practice:

rV applied Frequency (MHz)

0 8.0026
1 8.013
2 8.030
3 8.049
4 8.062
5 8.074
6 8.084
7 8.094
8 8.098
9 8.102
10 8.107

I just can't help thinking that it's not going to reach 8.2Mhz without
something closer to -24V on the control. :-( Still, if the worst comes
to the worst, 24 volts *is* available, at a pinch.

Okay, I've tweaked the resonator model parameters every so slightly to
better match your measurements, have made up diode models for the two
varactors you have available and plugged them all in to LTspice.

And guess what, you are right - you can't get there from here. The
problem is that the natural resonance is at 8MHz and you want to go
from 8.1MHz to 8.2MHz. The span is doable, but the starting point
is too far away. And adding more capacitance to ground at either end
of the resonator just pushes the starting point away even further.

Hmmm, what to do?

Add an inductive reactance to cancel some of the capacitance. It
turns out that 50uH plopped right across the resonator will shift
the action up, centering it nicely over your range of interest. With
that, no more than 10 volts is required on the control input and the
inductor eliminates the need for any gate biasing resistor. It also
lowers the node impedance to where a 1M feed resistor is okay for the
varactor dc bias. The one cautionary note is that the inductor you
use must be an RF type (it must have a reasonable Q at 8MHz - at
least 10 or so).

Here is the LTspice file (as usual, beware line wrap).

_________Ceramic_Resonator_L.asc_________

Version 4
SHEET 1 1960 680
WIRE 672 0 672 32
WIRE 496 32 384 32
WIRE 496 -112 512 -112
WIRE 672 112 672 128
WIRE 544 -112 512 -112
WIRE 656 -112 624 -112
WIRE 672 48 672 32
WIRE 256 -16 256 32
WIRE 256 -80 256 -112
WIRE 416 -112 400 -112
WIRE 256 -112 224 -112
WIRE 256 -112 288 -112
WIRE 96 -112 96 -80
WIRE 96 0 96 32
WIRE 128 -112 112 -112
WIRE 224 -112 208 -112
WIRE 112 -112 96 -112
WIRE 400 -112 384 -112
WIRE 672 32 624 32
WIRE 672 -80 672 -112
WIRE 672 -112 656 -112
WIRE 624 32 576 32
WIRE 384 -112 384 -32
WIRE 384 -112 352 -112
WIRE 384 32 384 -32
WIRE 384 -32 416 -32
WIRE 576 -32 496 -32
WIRE 560 32 576 32
WIRE 576 32 576 -32
FLAG 672 128 0
FLAG 512 -112 1
FLAG 656 -112 2
FLAG 624 32 3
FLAG 256 32 0
FLAG 96 32 0
FLAG 224 -112 5
FLAG 112 -112 6
FLAG 400 -112 4
SYMBOL Misc\\xtal 496 16 M90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 Invisible 0
SYMATTR InstName Y1
SYMATTR Value 6p
SYMATTR SpiceLine Rser=7 Lser=73u Rpar=1e8 Cpar=33p
SYMBOL cap 656 48 R0
WINDOW 0 40 24 Left 0
WINDOW 3 40 47 Left 0
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL voltage 528 -112 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 -60 56 VBottom 0
WINDOW 123 -32 56 VBottom 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL res 656 -96 R0
WINDOW 0 36 48 Left 0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL cap 352 -96 M270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName C2
SYMATTR Value 100p
SYMBOL Misc\\EuropeanResistor 400 -96 R270
WINDOW 0 27 56 VTop 0
WINDOW 3 5 56 VBottom 0
SYMATTR InstName U1
SYMATTR Value Gate
SYMATTR Prefix X
SYMBOL res 112 -96 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL voltage 96 -96 M0
WINDOW 0 40 48 Left 0
WINDOW 3 41 72 Left 0
SYMATTR InstName V3
SYMATTR Value {Vc}
SYMBOL varactor 240 -16 M180
WINDOW 0 40 32 Left 0
WINDOW 3 40 9 Left 0
SYMATTR InstName D1
SYMATTR Value BBY40
SYMBOL ind 512 -48 R90
WINDOW 0 5 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName L1
SYMATTR Value 50µ
SYMATTR SpiceLine Rser=10 Rpar=100k
TEXT 8 152 Left 0 !.tran 0 .3m 0 .1u uic
TEXT 384 80 Left 0 !.SubCkt Gate 1 2\nV1 3 0 2.5V\nG1 2 0 1 3 100\nD1 0 2 clamp\n.model clamp D( Ron=0 Roff=10 Vfwd=0 Vrev=5)\n.ends
TEXT 32 -96 Bottom 0 ;Control\nVoltage\n1-10V
TEXT 8 184 Left 0 !.ac lin 1000 8e6 8.5e6
TEXT 152 -224 Left 0 ;For Loop Gain plot V(1)/V(2) in ac analysis.\nOscillation occurs where phase crosses zero.
TEXT 8 120 Left 0 !.step param Vc list 1 10 20
TEXT 8 88 Left 0 !.param Vc=5
TEXT 776 -40 Left 0 !.MODEL BB149 D\n+ Is=4e-15 Rs=0.8 N=1.06\n+ Bv=45 IBv=120m \n+ tt=.22u Cjo=25p Vj=3.3 M=1.1
TEXT 776 -192 Left 0 !.MODEL BBY40 D\n+ Is=7.4e-15 Rs=0.5 N=1.06\n+ Bv=45 IBv=120m \n+ tt=.22u Cjo=58p Vj=3 M=1.03
 
A

analog

Jan 1, 1970
0
Why the "buffered" inverter? Just trying to be obstinate ?:)

No, I'll leave that to the experts. :)

As to your first question, the answer was given already in a prior
post but I don't mind repeating it. All that gain ensures that the
ac signal appearing across the varactor is small, thereby avoiding
modulation of the capacitance.

Lucky for you that wasn't in this week's quiz, eh?
 
P

Paul Burridge

Jan 1, 1970
0
Hi Analog,

Okay, I've tweaked the resonator model parameters every so slightly to
better match your measurements, have made up diode models for the two
varactors you have available and plugged them all in to LTspice.

And guess what, you are right - you can't get there from here.

I hope all my detractors noted that last sentence. :)
problem is that the natural resonance is at 8MHz and you want to go
from 8.1MHz to 8.2MHz. The span is doable, but the starting point
is too far away. And adding more capacitance to ground at either end
of the resonator just pushes the starting point away even further.

Hmmm, what to do?

Add an inductive reactance to cancel some of the capacitance. It
turns out that 50uH plopped right across the resonator will shift
the action up, centering it nicely over your range of interest. With
that, no more than 10 volts is required on the control input and the
inductor eliminates the need for any gate biasing resistor. It also
lowers the node impedance to where a 1M feed resistor is okay for the
varactor dc bias. The one cautionary note is that the inductor you
use must be an RF type (it must have a reasonable Q at 8MHz - at
least 10 or so).

Here is the LTspice file (as usual, beware line wrap).

Many thanks indeed. I'll check out the sim with interest and carry out
the mods later. Certainly sounds much more promising!
BTW, do you use LTSpice as a matter of course or do you have another
simulator you prefer over all else?

BW,

p.

_________Ceramic_Resonator_L.asc_________

Version 4
[...]
 
A

analog

Jan 1, 1970
0
I hope all my detractors noted that last sentence. :)

Understood, but do you really think it's wise to be wearing a "Kick
me, I'm gloating" sign on the back of your shirt?

Forgot to mention that since it's value depends on the resonator's
internal parameter values, the best value for the inductor could vary
somewhat from 50uH (although it's not super sensitive and the resonator
model *is* probably close to correct).
Many thanks indeed. I'll check out the sim with interest and carry
out the mods later. Certainly sounds much more promising!

Haven't mentioned it, but there is an alternate configuration with a
capacitive feedback network around the gate that makes it insensitive
to variations in gate gain and keeps the peripheral impedance's lower
and easier to work with. It trades more parts for less sensitivity.
But all that shouldn't matter in your case where custom tweaking
some of the component values for the parts used doesn't present a
problem.
BTW, do you use LTSpice as a matter of course or do you have another
simulator you prefer over all else?

At one time I used to use Pspice (at work, I have it and other
simulators available to me), but why bother with those bloated
monsters when LTspice is so much easier, faster and better supported?

For the work I do, I find that by "building" it first in LTspice,
I can usually get by with just one final prototype in my designs.
I suppose having enough experience to usually avoid the "garbage in,
garbage out" syndrome helps a lot, too.
 
J

Jim Thompson

Jan 1, 1970
0
No, I'll leave that to the experts. :)

As to your first question, the answer was given already in a prior
post but I don't mind repeating it. All that gain ensures that the
ac signal appearing across the varactor is small, thereby avoiding
modulation of the capacitance.

Lucky for you that wasn't in this week's quiz, eh?

It's "small" even with an 'HCU04, about 0.5V P-P at the input side,
but maybe your idea has some merit for the *extreme* pulling range as
Paul is trying to do.

Myself I'd add some inductance.

...Jim Thompson
 
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