# Help analyzing active full-wave rectifier.

Discussion in 'Electronic Design' started by MRW, Oct 17, 2006.

1. ### MRWGuest

Hello everyone,

Good evening!

Active full-wave rectifier circuit:
http://img273.imageshack.us/img273/6397/fullwaveactivedm9.jpg

Section of active full-wave rectifier circuit
http://img117.imageshack.us/img117/2217/fullwavepartza5.jpg

I need some help analyzing the active full-wave rectifier circuit in
the link above. I am wondering if someone can check if my work is
correct.

So far, I have the following:

VA1 = Vin * (R2)/(R1+R2)

VA1 = VA2 = VOA = VB1 = VB2

Then I decided to analyze part of the circuit as shown in the second

-I3 + I4 + I5 = 0

[(Vin - VB2) / R3] + [VB2 / R4] + [(VB2-VOB) / R5] = 0

VB2 * [ (1 / R4) + (1 /R5) - (1 / R3)] = [VOB / R5] - [Vin / R3]

VB2 * [ (R5*R3 + R4*R3 - R4*R5) / (R4*R5*R3) ] = [VOB / R5] - [1 /
R3]*[VA1*(R1+R2)/R2]

To keep things simple, I've set aside the following:

TMP1 = (R5*R3 + R4*R3 - R4*R5) / (R4*R5*R3)
TMP2 = (R1+R2)/(R2*R3)

So, I have:

VB2 * TMP1 = [VOB / R5] - VA1 * TMP2

Since VA1 = VB2, I have:

VA1 * TMP1 - VA1 * TMP2 = VOB / R5

VA1 * (TMP1 - TMP2) = VOB / R5

Substituting Vin with VA1:

(Vin * [R2 / (R1 + R2) ]) * (TMP1 - TMP2) = VOB / R5

Letting TMP3 = [R2 * R5 / (R1 + R2)]:

Vin * TMP3 * (TMP1 - TMP2) = VOB

Vin = VOB * [1 / (TMP3 * [TMP1 - TMP2])]

Have I done this analysis the right way? If not, where did I go wrong?

Thanks!

2. ### BanGuest

You first have to look at your circuit and understand it. You know already
it is a rectifier. This is not a linear function, where does it happen?
There is no diode. Now you have a look at your opamps. Normally Vcc is on
pin7 and GND/Vee on pin4. If you connect it the wrong way, you would see the
blue smoke, what opamp is this supposed to be?
Analyze the circuit with two different cases: Vin>0 and Vin<=0. Why is Vee
of the opamp tied to gnd?
There is also a capacitor on the input, it will act like a highpass, can you
simply ignore it?

4. ### Tom BruhnsGuest

Of course the pin connections for a quad op amp are different than
those that Ban gave, typical for a single op amp in an 8-pin
package...but why would one not use two sections in the same quad
package, instead of apparently two separate packages?

there is a very good reason that Vee is indeed tied to ground.

Yet another question: Does the circuit present the same resistance
load to the input capacitor through both the positive and negative
halves of an input waveform cycle? If it does not, what happens to the
DC level on the right side of the capacitor when you put in a signal?
Part of the answer to these questions has to do with what protection
there is on the op amp input pins: what does the input pin current do
if you try to drive the input negative?

Cheers,
Tom

5. ### MRWGuest

Thanks, Ban!

Actually, this is not a homework problem. I got this design from
EDN.com (search for active full-wave rectifier). The SPICE simulation
works, so I just wanted to see if I can understand its operations more
by writing the transfer function.

So far, my initial calculations indicate that VOB (output) will always
be positive because it relies on the relationship between the resistors
used in the circuit. But then again I'm not positively sure if I did
the analysis the right way. I just used the two golden rules of opamps
and also some nodal analysis.

I'll try to plugin some values in my equation once I can get access to
the university computer labs for Matlab.

Thanks!

6. ### MRWGuest

Thanks, Tom!

I've only got the macromodel of one opamp from National Semiconductors.
That's all they have. I really don't know much about SPICE modeling. I
haven't delve much into it.
Not really sure, I had the impression that the opamp inputs are
Any tips?

I'm kinda new to electronic design, so please excuse my lack of
knowledge.

Thanks!

7. ### EeyoreGuest

It has some diodes in it though !

Graham

8. ### Tom BruhnsGuest

Well, most ICs have either intentional or parasitic diodes from inputs
to at least the negative supply, so if you try to drag the input more
negative than ground in this case, they start to conduct, and will only
go "one diode drop" below ground at modest current.

Presumably those op amps are ones that work when the inputs are at the
same potential as the negative supply. The data sheet might say
something like "input common mode range includes the negative supply
voltage." And presumably the outputs will behave reasonably all the
way to the negative supply voltage. Typically, they can't actively
pull down quite all the way, but if you have a resistive load to the
negative supply, the output just stops sourcing any current, and the
resistive load drags the voltage down to zero. It's the inability of
the op amp output to go negative that gives you the "diode" effect that
makes the circuit a full wave rectifier. As Ban suggested, break the
analysis into two pieces, one when the input is positive and one when
it's negative. For a first pass, ignore any effects like current in op
amp inputs when they are dragged negative, but if you build the
circuit, such an effect would explain why you got a DC offset...

Imagine, for example, +1V at the junction of R1 and R3 (the input,
ignoring the capacitor). By inspection, what's the voltage at VA1, and
therefore at VB1? (Recognize R1 and R2 as a 2:1 voltage divider.) If
feedback is working around the second op amp, VB2 must equal (very
nearly) VB1, and you can calculate the currents in R3 and R4, knowing
the voltage at each end of each of them. The current in R5 must make
the net current in the VB2 node zero. That tells you the voltage drop
across R5. Be sure to get the direction right, and that drop added to
the voltage at VB2 tells you the output voltage.

The analysis for -1V at the input is different, because the output of
the first op amp cannot go negative...it will just go to zero. And it
should be clear how to do the rest of the analysis for that case.

You should be able to find LOTS and LOTS of op amp macromodels. If you
bunch of macromodels included with it. And you should be able to find
Spice macromodels from the TI, Analog Devices, and National
Semiconductor web sites, to name just three of many, for a great many
parts. You DO have to be careful about WHICH version of Spice the
model was written for. Most seem to be Spice2, and often use a POLY
keyword in some of the dependent sources. That's bad news for use in
Spice3, and you need to translate them, if you use a Spice3-based
simulator such as LTSpice. Well, as far as I know, LTSpice doesn't
automatically do the translation for you, but it's surprised me with
its capability before, so maybe it does. Anyway, a time-domain
simulation over one cycle should show you just what's going on in the
circuit, and make it clear how the "rectification" happens.

Cheers,
Tom