Hi Adam,
Re your first schematic, there's an asymmetry between the gate drive signals for Q1 and Q2. In both cases, the MOSFET responds to the gate-source voltage. Q2 has its source at the 0V rail potential, but Q1's source jumps around between 0V and +V. You have both drive signals referenced to 0V. The two MOSFETs won't see the same gate-source drive voltage. For simulation purposes, the simple solution is to move the negative side of V2 so it connects to Q1's source.
I have done a bit of digging and I have changed my circuit to match the microchip drawing from the app note AN1114 I found that explains what I am trying to explain but I probably explained it all wrong. Please feel free to comment and agree or disagree. If the circuit works differently to how they explain it then I would appreciate a detailed correct explanation.
That's a very thorough app note and the author certainly seems to know what he's talking about.
I haven't done any work with half bridge converters, so my understanding of them is on the basic level. I'll try to point out places where I think I'm more likely to be wrong.
Not the clearest explanation, but it's not wrong.
Extract from NXP document SMPS applications
That's not how I would have explained it, but again, it's not wrong.
Indicating that the capacitors do supply power
Again that's not how I would explain it. The energy all comes from the input power source, via the switching devices. The capacitors just provide DC blocking, in my view.
This is why I can’t see how the full supply voltage appears across the transistor as you mentioned. But please explain fully if I have misunderstood.
The full supply voltage appears across each transistor because they're connected in series across the full supply voltage and alternate between being fully ON and fully OFF.
If you ignore the capacitors and the primary, and just look at the switching devices, you can see that the common point of the devices is swinging between V+ and 0V. When it's at V+ (top MOSFET conducting), the bottom MOSFET sees the full DC supply voltage across it, and vice versa. This is true for the switching devices in any half-bridge circuit, and any full-bridge circuit too, for that matter.
SHOOT THROUGH
"A half-bridge converter is also prone to magnetic imbalance of the transformer core when the flux created by the switches Q1 and Q2 during the TON period is not equal. To prevent staircase saturation, the peak current mode control technique is used to decide the TON period of the switches Q1 and Q2. The maximum duty cycle of 45% with a dead-time between the two switches is used to prevent shoot-through
current from the transformer primary.”
It doesn’t mention anything about C3 and C4 having any relationship to preventing flux walking and as the capacitors effectively form the other half of the bridge circuit then they should always be there for this topology. The fact that Microchip state they are prone to flux walking. This would be misleading if C3 and C4 stopped flux walking wouldn’t it?
Yes, and I think it is misleading. But I don't have any experience with half bridge converters. It seems to me that since there is no DC path from the centre point of the capacitors, by definition, they block DC, and this should ensure equal energy input in each direction, and this is what prevents flux walking.
DC BLOCKING CAPACITOR CB
"A small DC blocking capacitor is placed in series with the transformer primary, to block the DC flux in the transformer core.”
You have used some very high values for C3 and C4. If you replace C3 and C4 with half of CB's capacitance each, and delete CB, then as far as I can see, the two circuits will be roughly equivalent, and C3 and C4 will do the job of CB. This assumes there's a big capacitor across the input supply, which is true in practice.
That seems like the sensible approach to me, because it uses less (and smaller) components, but I have no experience working with bridge forward converters so I can't be sure; there could be a subtle reason to use two large capacitors and a separate DC blocking capacitor.
OTOH, I don't think that application note gives recommended values for C3 and C4. They're shown as non-polarised capacitors, which implies relatively low values, but that's not conclusive.
FYI: On a side note: The other picture in the original post that I thought might be a tuned type looks like it is called a Half Bridge Resonant Converter and the main function of the capacitor is to form part of the resonant tank.
I guess that depends on the value of the series capacitor. I kind of doubt that it is a resonant converter, but then again, I don't know much at all about resonant converters.