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Grounding

Discussion in 'Electronic Design' started by John Popelish, Apr 11, 2007.

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  1. If it was my board, I wouldn't put ant grounds on top unless
    I had a particular reason for doing so. I would stitch
    short jumpers across any slots in the bottom side plane
    caused by bottom side traces, to improve the continuity of
    the plane. I would use pairs of grounded traces (or
    surrounds) to shield particularly sensitive signals, or to
    contain the noise or control impedance for particularly
    powerful or fast signals. Otherwise ground pour islands are
    just antennas.
     
  2. AJ

    AJ Guest

    Hi All,



    I know this subject has been beaten to death but I thought I would check
    people's latest thoughts anyway.



    I have a PCB with 2 switch mode power supplies and a PIC with a few other
    bits and pieces. Most of the tracks are on the topside of the board and I
    have used the bottom layer for a ground plane but it still has a few tracks
    and components. I have connected all of the ground pads on the topside of
    the board to the ground plane on the bottom layer via via's. In the past I
    have simply poured the copper ground plane on both layers anywhere it fits
    with 25mil clearance but lately I have been thinking this might not be the
    best way as it doesn't necessarily leave much control over where the ground
    current will flow. This time have split the bottom ground plane up into
    power and digital grounds with them connecting at one point.



    Now I am a bit confused as to what I should do with the top ground plane.
    If I pour copper over the top without regard, I will end up with some multi
    point grounding, where the ground pads are connected to the bottom plane at
    more than one point. Would it be wise to not use a top ground plane at all
    to prevent this and carefully control the ground currents to minimize noise?





    Regards,





    AJ
     
  3. MooseFET

    MooseFET Guest

    Where the bottom side ground plane has a trace plowed through but you
    wish the plane continued is the place to think about. In that area,
    you use traces, pours and vias to cover over the trace that was plowed
    in, as much as you can.

    This means that you are likely to end up pouring as many plane
    sections on top as you did on the bottom.
     
  4. Noway2

    Noway2 Guest

    If the board did contain any particular sensitive signals, controlled
    impedances or particularly fast signals, I would be hesitant to use a
    two layer board to begin with. Increasing to at least a four layer
    board would provide you with a solid power and ground plane that will
    act as a reference for your high speed signals and allow you to generate
    controlled impedances, which are a function of the geometry.

    On simpler designs that are predominantly low speed and low frequency, I
    commonly use a copper pour for a ground plane and sometimes use a top
    pour for the power. With judicious and proper use of decoupling
    capacitors and sufficiently wide traces, the power connections can be
    more arbitrary, but a low impedance ground is still a must.
     
  5. AJ

    AJ Guest


    Thanks for the input guys, I have tried to implement your idea's.

    Best regards,



    Adrian Hamilton
     
  6. Paul Mathews

    Paul Mathews Guest

    Going to 4 or more layers is often a superior approach, and it may not
    be as costly as you suppose. However, if you're stuck with 2 layers:
    Provided that you can adequately 'stitch' the layers together with
    vias, incomplete copper pours on different layers can improve
    grounding. However, this may require more vias than are economical,
    since board cost is partly determined by the number of holes. The key
    layout rules to observe:
    1) Do not allow high speed signal lines to cross 'slots and moats',
    since their associated return currents will be forced to go around the
    slot or moat, creating a loop that represents an impedance
    discontinuity, parastic inductance, and EMI radiator.
    2) Take particular care to stitch any 'flags', which are elongated
    copper pour regions. Any dv/dt on flags will radiate, i.e., EMI
    currents will flow through parasitic capacitance to the flag region.
    3) Pitch of stitching vias should be on the order of 1% of a
    wavelength of the highest harmonic frequency originating in the
    circuit or present in the ambient. For the mixed 100MHz DSP and 20-bit
    codec boards I've designed, this usually meant vias every 5 mm or so.
    Note that this is a density of 4 vias per sq cm, which is as many as
    400 extra vias on a 10cm x 10cm board.
    Paul Mathews
     
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