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Gated Implementation of JK flipflop

Discussion in 'General Electronics Discussion' started by PK_Rainbow, Apr 28, 2013.

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  1. PK_Rainbow

    PK_Rainbow

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    Apr 28, 2013
    Apparently my truth table was somewhat backwards. This has been answered, no replies necessary.


    I'm new and not sure where to put this, but here looks like a good place.

    So I am having a small problem, I need to make a gated JK flipflop that is positive edge triggered. I have already done a state diagram, primitave state table, and a merge diagram.
    The problem is with my final K-Map.

    I think I messed something up, but this is the first time I have done something like this, and I'm not too sure if I have messed something up somewhere, but as you can see from my K-Map, the FF will never change Q states, it just bounces around in Q = 0 or Q = 1.

    Can anybody offer some insight or some kind of help?
    [​IMG]

    [​IMG]

    [​IMG]


    I'm pretty sure that all of those are done correctly, but you can see that if I put those into a K-Map... well the states will never change.

    [​IMG]


    The circled states indicate a stable state in that region.
     
    Last edited: Apr 28, 2013
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