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Gate drive resistor question.

Discussion in 'Electronic Design' started by [email protected], Jan 23, 2008.

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  1. Guest

    Hi to all.
    I have been asked to look into a SMPS that is experiencing a higher
    than wanted failure
    rate in the field.Something that I've come across is ringing a bell.
    The controller chip (NCP1207)
    is driving a fet(IRFBE30) via a 47R resistor. The resistor is an 0805
    smt package.
    Somewhere on this group in the past I've read something about gate
    resistors failing because
    they are under sized.(power wise)
    Is this possible in this case with such a small package. If the gate
    resistor goes high impedance
    it would obviously cause catastrophic failure of the FET and then
    surrounding components.
    Which is what we are seeing.

    Could this be an issue?
  2. Terry Given

    Terry Given Guest

    Hi Rob,

    it certainly could be. if you look at the peak-pulse-power rating of
    0805 resistors, you will see it isnt very good at all - the resistor
    comprises a very thin layer of resistive material atop a ceramic
    substrate, so there isnt much meat within which to dump the pulse energy.

    the IRFBE30 Qg is about 60nC at 12V, so looks like about 5nF. at 47R
    thats 235ns time constant, which is a lot slower than the controller
    rise time. so the peak current is pretty much +12V/47R = 0.25A, and
    12V^2/47R = 3W peak pulse power.

    thats not really very much; an 0805 can eat about 1W no problems, so I
    wouldnt expect this to be a problem. were the gate resistance more like
    4R7, that would definitely ring alarm bells.

    part of the problem, of course, is that when the FET goes to the great
    silicon plant in the sky, it shorts D-G and then snots Rg and the
    controller.....making diagnosis that little bit trickier.

    Panasonic make some AWESOME 0603, 0805, 1206 surge rated resistors (they
    make MMA0204 and MMB0207 look puny). although they are more expensive,
    they fit in the same footprint, and can be used to remove suspicion from Rg

    BTW a 235ns gate time constant is pretty slow, and miller capacitance
    might be winning the fight against Rg, thereby stretching out the
    switching time even further, exacerbating switching losses. look at the
    gate waveform, at the plateau that occurs around Vth. This should be
    short (< 50ns). If it is not short, the gate drive is too weak. true for
    both turn on and turn off (although life is easy at turn-on for DCM).

    if its a DCM smps, check it has a soft-start, as DCM supplies ALWAYS
    power up in CCM until the output cap is charged. A useful test is to set
    up some time delay relays to turn a unit on for, say 10s (enough for it
    to start running) then off for long enough for all the caps to
    discharge. repeat ad nauseum. this will pretty soon let you know if
    there is a start-up issue.

  3. Guest

    Hi there Terry.
    There is something I forgot to add. There is a reverse diode across
    the resistor to decreace turn off time. On turn on the Miller
    capacitance is definately winning. In fact the gate voltage starts to
    fall for about 2V , never mind level out!!
    It seems that the gate resistor may well be a potential problem. I'm
    going to see if I can increace it to a 2010 footprint.
    As you have mentioned , once things have gone "pear shaped" it's
    difficult to find the cause of the failure :0(
    I'll check out if the supply has a decent soft start as well.
    Thanks for the help.
  4. Terry Given

    Terry Given Guest

    Hi Robin,

    the diode halves the number of 3W pulses seen by the resistor, and in so
    doing halves the duty cycle, making life a bit easier for the resistor.

    in that case, I'd definitely:

    a) look at the panasonic parts (digikey has them) - easier than a PCB

    (an alternative would be to parallel 5 x 220R 0805, which will happily
    suck up 3W PPP ad infinitum.)

    b) look carefully at the turn-on switching loss. if the gate drive is
    losing the fight with miller, the turn-on loss (if CCM) will be a lot
    higher than necessary. if its DCM, then the turn-on loss is
    0.5*Cstray*Vpk^2*Fsmps, regardless of switching time (Cstray = Cds +
    Ctransformer + Cwhateverelse)

  5. Guest

    Hi Terry.
    I'll see if I can improve the turn on time. The fet is not getting to
    hot though. Even at full power (36W about) it's not getting
    much above 50deg c , so I'm not sure if it is that serious. There are
    some other changes that need to be
    made so a board redesign is probably on the cards anyway.
    I'm not sure I understand your turn-on loss equasion.
    Is (0.5*Cstray*Vpk^2*Fsmps) the power dissapated in the FET during
    switch-on? There is no reference to Rds or current. I think I'm
    missing the boat here :0(

  6. Terry Given

    Terry Given Guest

    Oh, OK.

    if its DCM, then the current at turn-on is (by definition) zero. BUT
    when the FET turns on, the D-S capacitance (and xfmr capacitance and any
    other strays) have to be discharged, by the FET. so the FET dissipates
    0.5*Ctotal*Vpk^2 joules, each turn-on cycle - assuming the D-S cap was
    charged to Vpk just before the FET was switched on. so the power
    dissipation in the FET due to this (P = E*f, 1W = 1J/s) is
    0.5*Ctotal*Vpk^2*Fsmps. usually (but not always) Vpk = Vin

    in CCM, in addition to this capacitive loss, there is 0.5*Vpk*Imin*Tfall
    energy dumped into FET, where Imin is the CCM current value at turn-on
    and Tfall is the drain voltage fall time - this assumes the FET current
    ramps up to Imin before Vds begins to fall. so this switching loss is
    0.5*Vpk*Imin*Fsmps. ditto for turn-off, 0.5*Vpk*Imax*Fsmps*Trise (this
    last one is there in DCM too)

    while the FET is on, Rdson comes into play, and you get Irms^2*Rdson
    conduction loss.

    and just because the average FET temperature is 50C doesnt mean the
    junction is OK - ESPECIALLY during the turn-on (and turn-off)
    transients. Fairchild give thermal models for their FETs (eg FDP047AN08)
    use one of those and plug the swiching loss into it, you might be
    (unpleasantly) surprised at how high Tj can get in a short period of
    time - during switching edges, you can treat the IGBT die as if it were
    adiabatic, so all the switching energy causes the junction alone to
    heat, no heat flows into the tab. see "electro-thermal modelling of
    multi-megawatt power electronic applications using PSPICE" from

  7. Hammy

    Hammy Guest

    I'm using the NCP1200A, similar to the 1207.

    You may want to check your waveforms at turn off and compare them to
    page 12 and 13 of this datasheet.

    They do suggest using a diode between Vcc and the HV pin in the 1207
    datasheet but maybe whoever designed the SMPS was too cheap.
  8. Stranger

    Stranger Guest

    After the 47R resistor, just at the gate, you could shunt the gate to ground
    with a small high value resistor like 100K. That resistor won't affect the
    driving in any way. If the 47R fails, at least the gate will be shunted to
    ground instead of having it floating.

  9. Terry Given

    Terry Given Guest

    nice in theory. in practice kind of a waste of time, as it doesnt take
    much effort to win an argument against 100k.

    you could, however, use 10k + diode + pnp, set up as an active shunt.
    I'll leave the exact details as an exercise (hint: motorola used to make
    a chip that did this, back when SMPS controllers could only source current)

  10. Mark

    Mark Guest

    test your theory by shorting the gate to ground so you overstress the
    gate it like that for a day or two and see if you can
    cause the resistor to blow open the way you think....if a few samples
    don't open with a 10x or similar overtest like this, then I would look
    elsewhere for your problem.

    How much margin do you have in the FET dissipation and voltage and
    current ratings, how hot does it get?

  11. Guest

    Thanks for all the tips guys.
    I'll try running the resistor into a short for a while and see what
    happens. The fet is not getting to hot at all. 50deg c at full load.
  12. Guest

    Interesting , I'll look into this. Could quite easely be an issue.
  13. Mark

    Mark Guest


    how about the Drain Souce voltage derating?
    gate voltage derating?
    Drain current derating?
  14. Guest

    Hi there.
    Fet's rated to DS-800V
    Drain voltage never goes above 600V. Ringing is nicely snubbed.
    GS voltage is the normal +-20V. Never goes above 15V.
    DS current is 4.1A. Does not go much above 1A.

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