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Frequency characteristics of JFETs

Discussion in 'Electronic Design' started by Paul Burridge, Jul 26, 2003.

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  1. Greetings, gentlemen,

    I've downloaded the full data sheet for a J310 FET, which I intend to
    use as the active device for an RF pre-amp at 40Mhz. The general
    description at the top of the document says it's suitable for use as
    such into VHF and UHF, but there's no specific figure for gain versus
    frequency like you get with BJTs with the transition frequency
    parameter. How does one determine the relative merits of various FETs
    in this respect in the absence of such a parameter?

    <baffled>
     
  2. Marc H.Popek

    Marc H.Popek Guest

    iTS IN THE Cgs AN u RATIO
     
  3. Fred Bloggs

    Fred Bloggs Guest

    It's nearly impossible to build a bad preamplifier with this thing. See:

    http://www.wenzel.com/pdffiles/fmpreamp.pdf
     
  4. I think jfet hf tuned amps were generally operated in
    common-gate mode.
     
  5. And why would this change the situation?

    In grounded gate, fed from a voltage source to the source, again cgs
    does not matter. cdg is across the output drain to ground, hence its
    still gm.cgd. I neglected cds,as this is usually much lower than cgd. In
    case you haven't seen this, this may be of interest,
    http://www.anasoft.co.uk/EE/cmospafl/cmospafl.html

    Kevin Aylward

    http://www.anasoft.co.uk
    SuperSpice, a very affordable Mixed-Mode
    Windows Simulator with Schematic Capture,
    Waveform Display, FFT's and Filter Design.
     
  6. Active8

    Active8 Guest

    perhaps the NTE or ECG cross-ref would answer this.
     
  7. Well what I have in mind for this application is just a
    straightforward broadband common-source config.
    Anyway, it appears the dominant parameter here is Cgs. So say I have a
    FET with a Cgs of I dunno, say 50pf for arguments sake, how do I then
    establish what its voltage gain will be at 40Mhz?
     
  8. Use Spice.

    Kevin Aylward

    http://www.anasoft.co.uk
    SuperSpice, a very affordable Mixed-Mode
    Windows Simulator with Schematic Capture,
    Waveform Display, FFT's and Filter Design.
     
  9. Mark Zenier

    Mark Zenier Guest

    Yes, except for the package. J310 is TO-92 plastic and the
    U310 is a TO-206 metal can.

    If you can't find a datasheet, it'll be under J308 or U308 series.
    Or SST308, for SOT-23.

    Mark Zenier Washington State resident
     
  10. 50pf is much too large, think 5pF or thereabouts.

    You can't consider the jfet gain stage in isolation, the
    circuit has to include the source and load impedances,
    particularly their effect on the input/output RC rolloffs.

    A typical single jfet common-source stage could have an LF
    gain (Av) of about 5x, with effective total Cin = 30pF and
    effective total Cout= 10pF.

    Fin = 1/2.pi.Rsource.Cin and Fout = 1/2.pi.Rdrain.Cout.

    Suppose you want to be 3dB down at 80MHz (2x 40MHz).

    That forces Rsource to be not less than 66 ohms, and Rdrain
    not less than 199 ohms. These could be inconvenient values.

    The capacitances can be resonated-out with small inductors,
    (shunt-peaking), but it will be a struggle to get a useful
    voltage gain off one jfet at 40MHz.

    You really have to start the prob by specifying the source
    and load impedances, then decide the topology. For example,
    if it is a 75-75 ohm system, then the circuit in the URL
    that Fred gave is hard to beat for simplicity.
     
  11. Thanks, Mark. That explains a lot.
     
  12. 3dB down relative to the LF voltage gain of 5x.[/QUOTE]

    Oh I see. Thanks for the clarification (and the e-mail!)
     
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