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Flip-flop switch

Discussion in 'General Electronics Discussion' started by skunkfunk, Oct 25, 2012.

  1. skunkfunk

    skunkfunk

    2
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    Oct 24, 2012
    I need a scheme for 4013 or 7474 IC that works like this:

    [​IMG]

    I can't find on internet how to connect those IC's to work like that :(
    Please help.

    Thanks!
     

    Attached Files:

    Last edited by a moderator: Oct 25, 2012
  2. CocaCola

    CocaCola

    3,635
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    Apr 7, 2012
    Homework? If so how far have you got?
     
  3. CDRIVE

    CDRIVE Hauling 10' pipe on a Trek Shift3

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    May 8, 2012
  4. KrisBlueNZ

    KrisBlueNZ Sadly passed away in 2015

    8,393
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    Nov 28, 2011
    You have a conflict with your definition of behaviour. That's why you can't find a way to implement it!

    Look at your first two diagrams. Diagram 1 says that when both inputs are low, the output must be low. But diagram 2 shows a pulse on input 1, with input 2 low, and the output latching into a high state.

    Once the pulse on input 1 has gone away, input 1 will return low. Input 2 will be low. And you want the output to stay high. That directly conflicts with diagram 1.

    The truth table you've drawn up does not properly define the behaviour you want. That truth table defines the output state for every combination of input states; it is like a truth table for a two-input logic gate. There is no latching or memory involved. Each output is defined simply by a combination of input values.

    Going by the truth table, you want the output to be high only when IN1 is high and IN2 is low. You can do this with a two-input AND gate. Feed the first input from IN1, and the second input from IN2 via an inverter. The two inputs to the AND gate will only be high simultaneously when IN1 is high, and IN2 is low.

    But you seem to want some latching behaviour. You need to resolve the conflict between diagrams 1 and 2 so you can define a behaviour that is self-consistent.

    The behaviour you show in diagrams 2 and 3 is consistent with a set-reset latch, which can be implemented using a 4013. You can also use a 74x74 but the set and reset inputs are active low and both need inverters to get the logic you want. It's only the requirement in diagram 1, that the output is forced low when both inputs are low, that conflicts with that definition.
     
    Last edited: Oct 25, 2012
  5. MrEE

    MrEE

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    Apr 13, 2012
    The truth table indicates a combinatorial circuit (implemented with standard gates). Diagrams 2 and 3 seem to show hi to low transitions on an edge sensitive input. It is not clear if this is the intention or not. It is customary to indicate this with a small arrow pointing down at the edge of the transition. If you clarify you question a bit more, we'll be able to help you better.
     
  6. skunkfunk

    skunkfunk

    2
    0
    Oct 24, 2012
    Thank you guys. I'm building a circuit and part of that circuit is this. Basicly, I need cofiguration that powers rest of the circuit when impulse is applied on first input, and cuts the power off when impulse is applied on second input. That's it. I was doing an internet research and i found that flip-flop ICs. I was doing a simulation in Multisim and the 74x74 part of the circuit was working exactly as I wanted, but when I was testing the circuit in lab 74x74 burned out :D

    I'm studying energetic electrical engeneering in Croatia so my digital electronics knowledge is terrible, but I need this project for just one seminar.
     
  7. MrEE

    MrEE

    84
    0
    Apr 13, 2012
    ok, I see now. Look at the function table in the datasheet (posted by CDRIVE).
    It shows that you can do this by using the PR and CLR inputs. PR is your IN1 and CLR is your IN2. keep CLK = L. and D =X (X is don't care which means H or L)
    make sure pin 14 is +5 and pin 7 is 0 (or GND). use a decoupling capacitor of about 0.1uF between +5 and 0 as close to the pins as possible. Q will be your OUT.
    Don't connect OUT to anything before you try the circuit.
    I hope this helps.
     
  8. CDRIVE

    CDRIVE Hauling 10' pipe on a Trek Shift3

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    You're describing a common SR Flip Flop that is easily made from common logic gates.

    http://seminarprojects.com/Thread-s...ing-nand-gates-and-nor-gates-and-compare-them

    Chris
     
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