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Flip-flop power on state question.

Discussion in 'Electronic Basics' started by Rubicon, Sep 9, 2003.

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  1. Rubicon

    Rubicon Guest

    Hello,

    To define a flip-flops state when initial power is applied would you
    have both sides of the flip-flops CLR and PRE pins tied to V+.?

    The flip-flop is:
    SN54HC74, SN74HC74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH
    CLEAR AND PRESET

    Cheers,

    Andrew.

    Remove the ZZ from E-Mail address to contact me.
     
  2. No.

    The CLR and PRE inputs are active low. You need to hold one of them
    low for a short period after power is applied toplace the FF in a
    particular state. (If you want the FF to be set, hold the PRE input
    low).
     
  3. Tie both SET and CLEAR high through a resistor (2.2k -3.3k) then tie a
    capacitor from either SET or CLEAR to ground on the order of .1 uF. When
    power is applied the desired pin is briefly pulled to ground while the
    capacitor charges. It's worked for me.
    Good luck,
    Frank
     
  4. Rubicon

    Rubicon Guest

    Thankyou for your replies.

    Andrew.



    Remove the ZZ from E-Mail address to contact me.
     
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