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F to V converter problem

Discussion in 'Electronic Design' started by [email protected], Nov 11, 2008.

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  1. Guest

    The frequency to voltage converter makes use of a LM324, the circuit
    schematic can be found in (Page-4)

    The LM324 is fed off a single supply and the decoupling is based on
    the design found in (Figure 3, Page-2)

    The circuit parameters chosen for the frequency to voltage converter
    (corresponding to the circuit design parameter names used in the above
    mentioned urls) were chosen to achieve the following performance:

    1. Maximum frequency for max output with Vcc=9v is 1kHz
    2. Response time is approximately 100ms
    3. Circuit output approaches Low Level output of LM324
    (approximately 5mV) as input frequency approaches zero

    My question is as follows:

    In my current circuit design, the circuit output is not behaving
    correctly. As the input frequency approaches zero, the frequency to
    voltage converter output is no where near the Low Level output of the
    LM324. Further more, the output has unwanted ripples which i am trying
    to eliminate. I am seeking help on the possible changes and/or
    corrections required in order to achieve the desired circuit
    performance as listed above. Thank you.

  2. James Arthur

    James Arthur Guest


    o The LM324 input impedances aren't matched, creating
    an offset error, which is input to the integrator.

    o The op-amp's inverting input can get dragged below
    its common-mode range.

    o The R1-C1 called out won't charge or discharge
    fully or symmetrically for higher frequency inputs,
    producing non-linearities.

    o (d Vf/ dT) of D1-2 not compensated.

    o Vout drifts between input pulses, due to dielectric
    absorption in C2.

    Anything else?

    James Arthur
  3. Guest

    "As the input frequency approaches zero, the frequency to
    voltage converter output is no where near the Low Level output of the

    By running this from a single supply you have changed your "zero" to
    be at 1/2 the supply voltage. I would predict a zero frequency output
    near 4.5 volts (Vcc = 9V) You could add another op-amp to do some
    level shifting perhaps.

    "Further more, the output has unwanted ripples which i am trying
    to eliminate"

    Do the ripples have a 100ms time constant? If so that is just the
    nature of a F-V converter. You can reduce the ripple by increaseing
    the time constant (averaging more of the input pulses) but this
    increases your response time.

    George Herold
  4. Guest

    "No. Where would the 4.5 come from?"

    Oh, He is running this single supply and his second link seemed to
    imply that he had biasied the non-inverting input up to one half the
    supply voltage. But this is just an assumption on my part. A real
    schematic would be helpful.

    BTW it is fairly simple to configure the ADVFC32 from analog devices
    into a F-V converter.

    George Herold
  5. Rich Grise

    Rich Grise Guest

    It must be mid-terms. I wonder if we'll ever see any of the latest batch
    of googlies come back to check for answers, or do they expect them to just
    show up on thier desk?

  6. James Arthur

    James Arthur Guest

    Equally bad, when C1 pulses below ground its charge parcel
    dumps partly through the op-amp's input diode rather than
    getting integrated onto C2.

    That can happen at every single pulse, since the
    LM324 isn't fast enough to prevent it.

    A resistor to GND would harden up the LM324's
    output and make that less troublesome.

    James Arthur
  7. Daniel

    Daniel Guest

    Please be nice to this guy. He's a cadet engineer that I'm supervising
    here at an electrical untility company and I told him that newsgroups
    is a wonderful learning resource that he should take advantage of,
    learn from....and eventually contribute to. I'll suggest he posts
    values etc...many thanks on his behalf for the help so far.

  8. Guest


    My apologies for not replying sooner, this is the first time i am
    using this News Group
    and certainly did not expect such quick replies. So thank you so much
    for your input.
    I have sent out an email to all who posted comments to my question,
    which contains
    the latest circuit schematic and component values. Any further advice
    and instructions
    would be greatly appreciated.

  9. Ian Malcolm

    Ian Malcolm Guest

    DONT take it to email unless you need confidentiality or to transfer a
    binary file. You asked the question here and for every poster who
    replied, there are typically between 10 and 100 users of this group who
    have looked at this thread who might have some comment to make. Can you
    put the schematic on a web page somewhere and post a link to it here?

    Also many of the posters here DO NOT post with a valid email address to
    avoid vast quantities of spam and will never get your message.

    Usenet rule of thumb:

    ONLY take it to email if invited to or you are already a friend of the
  10. Rich Grise

    Rich Grise Guest

    Teach him to lurk, and to use the other side of google.

    Good Luck!
  11. Guest

    Thanks for the 'Heads Up' Ian, point taken.

    As i do not have a web-site of my own at the moment, shall look into
    getting one up to make things easier.

  12. James Arthur

    James Arthur Guest

    We often post schematic in ASCII text, right here in s.e.d.

    You can use a dedicated editor, like Andy's Ascii-Circuit V1.28

    or just use plain old Notepad.

    Here's your schematic, in ASCII: (view in Courier font)

    | || +
    .-. .---||----.
    | | | || C2 |
    R | | | ___ |
    '-' C1 +--|___|--+
    C | 74hc14 R1 | R2 |
    || | |\ ___ || D2 | |\ |
    o--||----+---| >O--|___|--||-+---|<--+--|-\ |
    || | |/ || | | >---+--> output
    | | .----|+/
    .-. v | |/
    R | | D1 - | LM324
    | | | |
    '-' === ===
    | GND GND

    (created by AACircuit v1.28.4 beta 13/12/04

    James Arthur
  13. Guest

    Thanks James.

    Could you please elaborate on a point you made earlier that "(d Vf /
    Dt) of D1-2 not compensated".

    I have rederived the design equation for the circuit output:

    Vout = 4.5 x (1 - Z1 / Z2)

    This equation assumes that Vin is a 9V peak-to-peak square wave coming
    from the Schmitt Trigger
    and the circuit supply voltage Vs is 9V DC. while Z1 is the equivalent
    impedance of R1 & C1, Z2 is
    the equivalent impedance of R2 & C2. Also assuming that i am using
    single supply decoupling.

    Doing this the old fashion way by bread-boarding it, the output is Vs/
    2 regardless of the value of Vf.
    I have not being able to resolve this issue.

    Based on this design the new component values are as follows:

    R1 = 10k
    C1 = 0.1uF
    R2 = 50k
    C2 = 0.39uF

    This gives the following dervied circuit performance @ 200Hz Vf:

    response time = 20ms
    Z1 = 18k
    Z2 = 2k
    Vout = 4.009V

    The Schmitt Trigger i am using has a Negative Going Threshold of about
    4V, thus, frequencies
    below 200Hz will produce a high output on the Schmitt Trigger. This
    will in turn be fed into another
    Schmitt Trigger simply inverting the high output to low, which will
    drive an LED that switches on
    whenever the frequency is below 200Hz.

  14. James Arthur

    James Arthur Guest

    I can't. Thanks to the NYAG and the danger of someone
    somewhere possibly seeing nakedness, my ISP no longer
    provides abse.

    James Arthur
  15. James Arthur

    James Arthur Guest


    I did a twin interleaved charge-dispenser
    thing, to cut drift. Not worth the bother
    in this case.

    James Arthur
  16. James Arthur

    James Arthur Guest

    It's a drift-over-temperature thing. Vf--the forward
    voltage of D1 and D2--changes with temperature.

    That will change the voltage placed across C1, and how much
    of that voltage is input to the integrator U2.

    Specifically, the effective voltage across C1 will increase
    about 5mV/ºC. For a 5v supply, that's a drift of +0.1%/ºC.

    You might not care.

    James Arthur
  17. James Arthur

    James Arthur Guest

    No. Consider the circuit as dispensing small packages of
    charge from C1 at each input rising edge, and integrating
    those in C2. R2 bleeds off that charge at a controlled rate.

    If you prefer, as input pulses come more quickly, the
    rectified pulses from C1 look more and more like a
    continuous current being fed into an inverting stage
    with a gain set by R2.

    James Arthur
  18. Guest

    Ahh very nice. I didn't quite 'get' how the ripple cancels when you
    described this before. But I see it now, (I think). You choose the
    one shot pulse time to be 1/2 the period of the "zero ripple
    frequency". This would imply that the maximum frequency is then
    twice the "zero ripple frequency". Is that correct?

    George Herold
  19. ehsjr

    ehsjr Guest

    You have to wait (a day or 2 ?) then it can be seen.
    Jim's is there, now.

  20. James Arthur

    James Arthur Guest

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