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Extracting wire parasitic from silicon ensemble or other tool

Discussion in 'Electronic Design' started by nimayshah, Feb 14, 2007.

  1. nimayshah

    nimayshah Guest

    Hi all,

    I am using silicon ensemble for automatic place and route of some
    iscas '85 benchmarks and then exporting the designs in gds2 format
    which are then streamed (imported) into icfb (virtuoso). Then i have
    to extract the spice netlist from the layout and run some simulations
    on them using hspice. I also have to consider wire parasitics. I have
    the following questions:
    Is there anyway by which i can automate this by silicon ensemble or
    any other tool?
    If this cannot be automated what is the best method to use, which is
    easily scalable (equally easy to apply on large benchmarks) by which i
    can put in the wire parasitics in my spice file?
    Also, i have one more question, which is not related to this, but what
    exactly is the .dspf file which we can get from silicon ensemble?

    Thanks,

    Regards,

    Nimay Shah
     
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