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ESD protection for mosfets?

Discussion in 'General Electronics Discussion' started by Shark87, Aug 28, 2014.

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  1. Shark87

    Shark87

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    Aug 28, 2014
    Hi,
    my circuit has some BSS127 nMOS class 0 (<250V --> JESD22-A114-HBM) ; if, when it is not powered, drain only was exposed to an ESD, with gate and source floating (less than a certain capacity to ground), how many chances I have to save the mosfet, maybe deflecting the discharge through spark gaps dimensioned for 1kV ESD?
     
  2. (*steve*)

    (*steve*) ¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd Moderator

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    Hi Shark, it's probably best to start a new thread for a new query.

    Can you post a schematic of your circuit and indicate how it is exposed to ESD.

    In general, if you have a floating gate, more than 20V is hazardous for the mosfet.
     
  3. Shark87

    Shark87

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    Aug 28, 2014
    Thank you Steve.
    In my circuit the gate in connected to AHC259 driver, but when not powered it remains floating. Drain pin goes directly to the connector (P1 and P2 in schematic), which is subject to ESD when the board is handled without care. Each connector pin (Pi) is connected to two mosfet (MIS and MRIF are isolated).
     

    Attached Files:

  4. (*steve*)

    (*steve*) ¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd Moderator

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    From the information I can glean from that, you'd have a hard time controlling the mosfets.

    I guess I'm saying that either it's a very poor design or there is insufficient information for me to tell that it's not. I have no idea what MIS or MRIF is. I also don't know what p[1] or p[2] is, but that is less of an issue. Given the gates are controlled by 5V logic, they would need to be within a few volts of the logic ground or the circuit can't control the mosfets.

    A resistor between the gate and the source is likely to protect the gate significantly from ESD, but not from voltages delivered from a low impedance on MIS or MRIF.

    Is this your design? Do you know what it's supposed to do?
     
  5. Shark87

    Shark87

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    Aug 28, 2014
    It is an extrapolated part of a complex board, MIS and MRIF are the reference for U1 and U137 respectively. They are galvanically isolated each other and to ground. The ESD problem occurs only when board is disconnected, in this situation only P[1] and P[2] can be touched by operator.
     
  6. (*steve*)

    (*steve*) ¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd Moderator

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    If everything is galvanically isolated then I can't see how you can turn the mosfets on. You would need to use an optically coupled gate driver so you can apply a voltage between the gate and source. This would also act to protect the gate from ESD.
     
  7. Arouse1973

    Arouse1973 Adam

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    Dec 18, 2013
    Galvanic isolation will not protect a piece of equipmentt from an ESD event. It may help upto 8KV if your lucky. You need correct ESD preventative measures if you want to protect MOSFETS.
    Adam
     
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