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Error code for LTSpice

Discussion in 'Power Electronics' started by thomasxdddddd, Nov 3, 2020.

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  1. thomasxdddddd

    thomasxdddddd

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    Nov 3, 2020
    I am trying to run the simulation, but there is an error code shown as attachment. The .asc file is also attached. Can anyone teach me how to get rid of it?
    upload_2020-11-3_18-16-29.png
     

    Attached Files:

  2. Harald Kapp

    Harald Kapp Moderator Moderator

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    Nov 17, 2011
    According to the (incomplete, see below) netlist you have:
    R1 NC_01 N008 3.32K tol=1 pwr=0.1

    In the schematic this is here:
    upload_2020-11-4_6-21-19.png
    It seems R1 is not properly connected to the component to the right (missing in this schematic due to missing library).
    Also labels for this resistor (R1) and the capacitor are absent from the schematic.

    For us to be able to check your .asc file please supply the libraries used that contain these missing components:
    upload_2020-11-4_6-16-12.png
     
  3. bertus

    bertus Moderator

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  4. thomasxdddddd

    thomasxdddddd

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    Nov 3, 2020
  5. Harald Kapp

    Harald Kapp Moderator Moderator

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    Nov 17, 2011
    Of course, I know I do. that's why I asked the op to post the library he used, too. The LTC/AD standard libraries do not contain these 2 parts.
    Do you get the same error message?
     
  6. bertus

    bertus Moderator

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    Hello,

    @Harald Kapp Yes, I get the same error.
    It seems to be related to one of the sources.
    It looks like the TS is trying to make a class D amplifier.

    Bertus
     
  7. thomasxdddddd

    thomasxdddddd

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    Nov 3, 2020
    Yes, I am trying to simulate a class D amplifier, but not too sure how to solve this error:(
     
  8. Harald Kapp

    Harald Kapp Moderator Moderator

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    Nov 17, 2011
    After some fiddling: Connect the RST input of the LMC555 to a meaningful potential. The open input is the cause for the issue.
     
    bertus likes this.
  9. bertus

    bertus Moderator

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    Nov 8, 2019
    Hello,

    @Harald Kapp , Indeed, connecting the RST of the 555 to V2 will let the simulation run.

    The output seems to next to nothing:

    thomas Project(Draft) - week 6 run.jpg

    Bertus
     
  10. Harald Kapp

    Harald Kapp Moderator Moderator

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    Nov 17, 2011
    Apart from the missing RST connection I see that the circuit around the 555 looks rather unusual. I guess it is supposed to be a triangle wave generator, but the circuit doe not match what you find when you look up this kind of circuit with a 555.
    @thomasxdddddd : check your circuit and tell us a bit more about what you intend to do and how your circuit is meant to operate.
     
  11. bertus

    bertus Moderator

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    Nov 8, 2019
  12. Harald Kapp

    Harald Kapp Moderator Moderator

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    Nov 17, 2011
    One never stops learning.
     
  13. Harald Kapp

    Harald Kapp Moderator Moderator

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    Nov 17, 2011
    It helps to kick-start LTSPICE with a .IC statement:
    upload_2020-11-4_13-12-47.png
    Note that I labeled the signal trig.

    The transient simulation generates this signal on "out":
    upload_2020-11-4_13-14-27.png
    AC simulation as in the original file gives a flat line for me, too.
     
    bertus likes this.
  14. thomasxdddddd

    thomasxdddddd

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    Nov 3, 2020
    I believe the LMC555 chip within that library is a bit bug as when I switched into a normal 555 chip (NE555), it works and able to produce the "triangular wave" I also made some amendments toward the design, Would you guys giving me some feedback toward the new design. This design is about a class D amplifier, using the 555 chips as a triangular generator, a comparator with 2 outputs, IR2110 gate driver controlling the 2 MOSFETS which control the speakers. I am planning to have a range from 20Hz to 22kHz 100W class D amplifier with 4-ohm load(speaker).
     

    Attached Files:

  15. thomasxdddddd

    thomasxdddddd

    9
    0
    Nov 3, 2020
    upload_2020-11-4_16-8-14.png
    i have got this, when I changed into the older 555 chips, may be the LMC555 chips on the forum is not complete
     
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