Jim said:
ISTR that there was recently a discussion of how to make an
Edge-Triggered S-R Flip-Flop... a rising edge on one input sets the
flop, a rising edge on the other input resets.
I should keep notes... I can't remember how it was done.
Anyone still have a copy?
Thanks!
With 2 flip flops, or with 8 NAND gates. Replace them with NORs and
swap the outputs for negative edge trigger.
OUT
|
|
+-------|--------------------------+
| | |
| | +-------------+ |
| | | | |
^ | | | ^ | |
| *********** | | | *********** |
| * R * | | | * R * |
+---*D Q*--+ | +---*D Q*--+
* * | * *
* _* | * _*
+---*CLK Q*O------+ +---*CLK Q*O
| * * | * *
| *********** | ***********
| |
| |
| |
SET RESET
I traced the circuit below with 4 possible initial states.
below: Q(initially) = 0 RESET = 0
/1
SET -----+------------------------|
| |NAND>--+ \2
+-------| \6 +--| | /7x
|NAND>--+-----+ |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| /5 | |
|NAND>-----+ |
\4 +-------| +--| Q
| |NAND>--+------- /3
+--------------------------------+--| |
| |
+----------|--+
| |
+----------+ |
| | _
+--------------------------------+--| | Q
| |NAND>-----+---- \4
/3 +-------| +--|
|NAND>--+ \4x |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| =1 | |
|NAND>-----+--+ |
+-------| +--| |
=0 | |NAND>--+ =1
RESET -----+------------------------|
below: Q(initially) = 0 RESET = 1
/1
SET -----+------------------------|
| |NAND>--+ \2
+-------| \6 +--| | /7x
|NAND>--+-----+ |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| /5 | |
|NAND>-----+ |
\4 +-------| +--| Q
| |NAND>--+------- /3
+--------------------------------+--| |
| |
+----------|--+
| |
+----------+ |
| | _
+--------------------------------+--| | Q
| |NAND>-----+---- \4
/3 +-------| +--|
|NAND>--+ =1 |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| =0 | |
|NAND>-----+--+ |
+-------| +--| |
=1 | |NAND>--+ =1
RESET -----+------------------------|
below: Q(initially) = 1 RESET = 0
/1
SET -----+------------------------|
| |NAND>--+ \2
+-------| \2 +--| | /3x
|NAND>--+-----+ |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| =1 | |
|NAND>-----+ |
=0 +-------| +--| Q
| |NAND>--+------- =1
+--------------------------------+--| |
| |
+----------|--+
| |
+----------+ |
| | _
+--------------------------------+--| | Q
| |NAND>-----+---- =0
=1 +-------| +--|
|NAND>--+ =0 |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| =1 | |
|NAND>-----+--+ |
+-------| +--| |
=0 | |NAND>--+ =1
RESET -----+------------------------|
below: Q(initially) = 1 RESET = 1
/1
SET -----+------------------------|
| |NAND>--+ \2
+-------| \2 +--| | /3x
|NAND>--+-----+ |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| =1 | |
|NAND>-----+ |
=0 +-------| +--| Q
| |NAND>--+------- =1
+--------------------------------+--| |
| |
+----------|--+
| |
+----------+ |
| | _
+--------------------------------+--| | Q
| |NAND>-----+---- =0
=1 +-------| +--|
|NAND>--+ =1 |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| =0 | |
|NAND>-----+--+ |
+-------| +--| |
=1 | |NAND>--+ =1
RESET -----+------------------------|