Dumb question regarding SMPS

If someone has a free moment, I'd like to know:

I'm on my third laptop right now. Every time I plugged my Dell's "fat
snake" into the wall, I drew quite an arc. The Lenovo's arc was not
noticeable, but now I get a noticeable arc with my new HP -- not as
big as the Dell's, however.

I know FA about switch mode power supplies, obviously, so I wonder

1. What produces the arc?
2. Why would different power supplies produce different arcs (does it
just depend on output power capability)?
3. Why is there no arc when I pull the plug from the outlet?

 

That verifies it.

Jamie

 

I like the ucc28019a. works like a champ. Undervoltage lockout too

Cheers

 

Might be the new normal. I want to design in a National video driver,
LMH6722. Has a thermal pad under its belly. In the datasheet they forgot
to mention where its s'posed to be connected to. Probably V- but I'd
rather make sure. Filed a support ticket with the new owner TI on 10/2.
Got a service request number.

Today is 10/8 and (finally! ... or so I thought) there was a message in
the inbox this morning. A form letter, merely saying that, tada, a
service request number has been issued. New number: Same as the old number.

So I responded politely as to when I might be expecting an answer. No
response all day.

Hurumph!

 

No kidding, that may be the only way :-(

Just made a CAD model for a 100-TQFP processor. Now I know why I chose
to become an analog guy and not a digital one.

 

They're either overworked or lazy, so they punted. Probably the
responders are graded based on how fast they turn around responses,
and on yours they already hit infinity.

 

An idiot who can't even do simple connect-the-dots layouts.

Yep, you just reinforced anyone's faith in your abilities. Not.

 

Lo and behold, just as I wanted to order samples I finally had a "You've
got mail" event. TI support said the pad is not connected to anything.
It can be left floating (which I'd never do, of course), connected to
V-, or connected to GND (which I'll do).

 

I was curious so I looked at the pdf with the pcb for the evaluation
board,
it doesn't even have a pad on the pcb for the thermal pad
V+ and V- goes under theat part from each end to the center pins

-Lasse

 

The challenge is always with switchers. The upper FETs of a bridge or
sync-buck are easy, I just use a V+ plane. The lower ones hang on the
switched node with their heat-carrying drain tabs. That is a real pain
because normally you don't want to make that very capacitive.

Modern datasheets are notoriously incomplete. Even uC with their
hundreds of pages. They discuss the logic stuff ad nauseam and then, if
you are lucky, you find one or too sparsely populated pages on the ADC.

 

we have everything modeled in inventor, pcb with components,
enclosure,
connectors etc.

so we know it will fit in the box, there's room for the connectors
etc.

-Lasse

 

No, just the schematic library part and footprint. A hundred pins, most
of which have names like this:

(OC0A/OC1C/PCINT7)PB7

One typo and all hell can break loose because the routing resources in
those uCs are sparse and can be unforgiving. Just had a major
re-shuffling in one of them on another project, not because of an error
but for a feature change. When those get maxed out in port pins the
design can slow down as much as Van Ness at rush hour, mainly because of
routing compromises.

 

Yikes!

Don't know about this one but sometimes with eval boards I have the
feeling that they aren't always super great. I remember one where I
fired it up, ran it with standard load and then caught a whiff of an
"amperage smell". Followed by smoke. That was the snubber resistors
turning themselves into charcoal. Another board ... one minute, two
minutes, three ... *PHHHHUT* ... a diode had left its workplace without
prior authorization to do so. A quick calc revealed a 3x or so overload.
Luckily I found its pieces on the floor before a guide dog puppy we had
for a week.

 

looks like they just more or less copied the layout from the packages
that don't have a thermal pad

strange how eval board are often like that, would think they wanted to
present
their part in the best possible way

can only guess they assume those who need the performance will build
their own
board anyway and those who buy the eval board generally won't notice

-Lasse

 

Wot reference? Sometimes they think that VCC _is_ a good-enough
reference. Sometimes we've had to do ratiometric conversion just because
there wasn't even a pin to pipe in your own reference.

 

Actually some are not bad at all. Otherwise they would not pass muster
with agencies when they are placed in metering applications. Often it is
important to halt processor activity during a measurement, that can make
a huge difference. This is what we'll likely do for the project I am
working on right now.

 

You *should* be able to either grab the names from a spreadsheet or
cut-n-paste from a datasheet. The vendors often have models already built
that can be used for a starting place, too. OTOH, our CAD people demand that
chips look on the schematic like they do on the board - no functional
partitioning (except BGAs, for some reason).

 

Or a hundred pages on register settings and one or two pages on the hardware
itself; worse, the hundred pages isn't even complete.

 

Only for some CAD packages, if at all. My CAD has a lot of the Atmels,
just not this big one.

I insist on the same, I really hate netlist-style schematics where the
front axle is on page 17 which the left front wheel it on page 32.
Exceptions are logic gate and opamp multi-packs, of course. And I never
use large BGAs, those can spell doom in a hi-rel environment.

 

Yup :-(

Very classic omission: Do the ports have input hysteresis or not? And if
yes, how much? Once the answer from the tech support engineer, after
long head-scratching, was: "Good question! I'll have to inquire about
that at the factory". Oh man ...