Connect with us

DPAK and D2PAK power dissipation

Discussion in 'Electronic Design' started by Liuc, Dec 12, 2006.

Scroll to continue with content
  1. Liuc

    Liuc Guest

    Hi everyone,
    I am trying to figure out which is the best way to make a GND plane act
    as power dissipation area for a DPAK/D2PAK device (the L78M10ABDT from
    ST for example).
    Apart calculation of the area used, which I found in their AN1703, I am
    asking myself how to design this area: I have components only on the
    top side, and tracks for 90% on the top side too of a 2 layer PCB. So I
    have part of the top layer and almost all the bottom for GND plane.
    My specific questions are:
    1) how must I act with the solder stop layer? is it better to leave
    this "heatsink" area uncovered? both on top and bottom? or not?
    2) vias: is it better to connect top and bottom with multiple vias or
    with few (I don't have limits from my pcb manufacturer)? big or little?
    (this providing a gnd plane also on top layer)
    3) I have also, of course, a gnd plane on the rest of my pcb for the
    other devices (1 PIC , 4 relays and 4 other ICs, total current max
    [email protected]). should I make all a big plane, or make 2 polygons
    connected only in 1 point?

    THese are the questions in my mind, of course all other suggestions are
    more than welcome.

    thanks since now,

  2. John  Larkin

    John Larkin Guest

    I assume you mean solder mask. Thermally, it doesn't matter.
    Lots of vias will conduct heat from the topside pour (around the dpak)
    to the bottom ground plane. Six or eight 30+ mil vias, close around
    the dpak, should work... something like that.

    One big plane!

  3. Rich Grise

    Rich Grise Guest

    But watch out for relay coil noise on the digital ground!

  4. John  Larkin

    John Larkin Guest

    Digital ground? Ground is ground. And there can't be noise on ground;
    you just define it to be zero volts!

  5. Dan Coby

    Dan Coby Guest

    I predict that you are going to find that life is full of surprises. ;-)

    Yes. in theory you can define a 'ground' point as being at zero.

    However any real real circuit that has currents flowing through wires
    will have non zero voltages due to the resistance of the wires, inductive
    effects when the currents change (i.e. relay noise or other switching noise
    effects) and cross talk due to magnetic field coupling between signals, etc.

    At high frequencies there are other problems that have to be considered
    related to signals bouncing off impedance mismatches, etc. Ask anyone
    that works with RF, microwave, or modern high speed computer circuits.
    (FM radio is at 100 Mhz, this is a low frequency by modern computer

    Yes. in theory you can define a 'ground' point as being at zero however
    if you look at any other point in your circuit, the voltages will not be
    even on wires connected to your 'ground' point.
  6. ["Followup-To:" header set to]
    On Tue, 12 Dec 2006 08:05:01 -0800,
    close around -- or right beneath it. Anything wrong with that?

  7. Does anybody sell that ground? I've been looking for it on some of my
    recent projects.
  8. John  Larkin

    John Larkin Guest

    Either is OK. For production, people mostly prefer to not have vias
    under the part, because they slurp solder paste away from the pad. If
    you hand solder, they're OK... just use lots of solder, and filling
    the vias will hugely reduce their thermal resistance too.

    But for best thermal performance, the vias should be spread out some.
    Dumping all the heat into a small patch of the backside ground plane
    suffers from the thermal spreading resistance of the groundplane
    copper... the foil is thin and isn't a perfect heat conductor, 70K/W
    per square for 1 oz copper. If it's a small board and the chip
    dissipation is low, it's no big deal.

    How much power will the dpak dissipate? and how much groundplane area
    is available?

  9. John  Larkin

    John Larkin Guest

    Oh, life certainly is. And splitting ground planes multiplies the
    surprises nicely.
    Sure. Just deal with it.

  10. Rich Grise

    Rich Grise Guest

    That's kinda what I was getting at - watch that the supply return to the
    sensitive digital stuff doesn't cross/share paths with the 24V relay
    supply return. and that neither crosses/shares with the sensitive analog
    stuff. I guess this can be done by visualizing current paths - it seems a
    split plane is kinda the lazy person's way out. ;-)

  11. Rich Grise

    Rich Grise Guest

    Go to an aviation boneyard, and pick up one of those boxes of dirt that
    they put in the tails of airplanes to ground their avionics to. ;-)

  12. John  Larkin

    John Larkin Guest

    Send me a purchase order, and I'll make you a deal on 1000.

  13. I read in an app note somewhere that suggested instead of using large
    holes, use the smallest hole size that would at least 85% fill with
    solder to make a better thermal connection. You should be able to ask
    your board house what this size is.

  14. Eeyore

    Eeyore Guest

    Solder filling isn't particularly reliable esp with lead-free.

    A larger hole introduces more copper which is a good thing (tm). I use about 2mm
    holes for this.

  15. John  Larkin

    John Larkin Guest

    A 20-mil drill (1 mm to you furriners), plated to 1 oz, through a
    0.062 thick pcb, has a thermal resistance of about 70 k/w. Theta falls
    as diameter increases, and drops hugely if you can fill the bore with
    solder, which would usually have to be done by hand.

    So maybe half a dozen 30 mil holes would get down below 10 k/w net,
    pretty good considering the thermal resistance of the surface copper
    itself. Using internal planes helps a lot, as the theta to them is
    less and they can help spread the heat laterally, especially if you
    can include a second ring of holes further out.

    I haven't figured out if it's better to use a few big vias or a lot of
    smaller ones, or what the optimum pattern might be.

    Nowadays, of course, the board houses seldom actually give you the
    copper thickness you spec.

  16. Eeyore

    Eeyore Guest

    0.8 mm in fact.

  17. John  Larkin

    John Larkin Guest

    0.508 mm in fact.

  18. Eeyore

    Eeyore Guest


    0.787mm if you want me to be more accurate but 0.8mm is a standard drill size over here.
    I've never seen anyone claim to drill smaller than 0.6mm without complications btw.

  19. John  Larkin

    John Larkin Guest

    25.4 mm to the inch, right? So 0.02 inches must be 0.508 mm. Google

    The smallest vias we regularly use are 10 mil drills, 0.254 mm. That's
    good enough for a 456 pin FBGA package, or a very dense board in
    general. Heck, some bga balls are on 0.8 mm centers. I've heard of
    people using 4 mil vias.

  20. ?? drilled via sizes of 15-20 thou are pretty common with. 4 thou or
    less is possible these days (0.1mm) but I don't think they are
    conventionally drilled (laser).

    Consider these drill sizes:

    #77 = 0.018" (0.45mm)
    #78 = 0.016"
    #79 = 0.0145"
    #80 = 0.0135" (0.34mm)

    Which make up roughly 50% of the sizes in an assortment of carbide
    bits which I picked up, presumably representing how frequently they
    are used.

    I'd hate to think of 2.5, 3 or 4 mil lines and spaces with 31 mil

    Best regards,
    Spehro Pefhany
Ask a Question
Want to reply to this thread or ask your own question?
You'll need to choose a username for the site, which only take a couple of moments (here). After that, you can post your question and our members will help you out.
Electronics Point Logo
Continue to site
Quote of the day