does frequency division change phase?

I have two frequencies of 10MHz each just that one of them is lagging behind other by some interval.
for the purpose of measurement, i have constructed a circuit that divides the frequencies by say 32.
so will the phase difference between the older frequencies and the newer frequencies be different?

 

@steve:The phase difference may be totally scrambled by such an action.

may i know the exact reason behind the scrambling of phase difference?

 

I am mainly interested in the time difference between the two waves.
i feel that the time shift will be the same. For example, if one frequency lags the other by 20ns then they will have the same time delay after dividing. thats what i feel. so do you have any suggestions over the time delay?

 

there is a sensor a transmitter and a receiver.
the transmitter sends the wave and the receiver gets it.
the time diff between the two waveforms is to be calculated.

 

i m not calculating range based on the lag between the sent and received signal.
it is a property of the material which depends upon the phase / time lag.
Signal-> can be anywhere between 1Hz to 10MHz. It can be low frequency, audio frequency or RF.

 

we have to store the received signal. But the high frequency of signal will be a problem since storing a signal means that it has to be sampled (10 samples per wave) and converted into digital format. so no microcontroller operates at 10x10x8MHz.
so we r planning to do it using ADC and PLDs or PALs or some gating logic to store the signal.
and once the signal is stored, the signal will be transmitted to micro slowly.
so do u have any suggestions over this approach?

 

we want to build a receiver that receives a wave of 10Mhz
micro controller doesnot work out for this stuff bcos of the reasons that we discussed.
so we have come up with an alternative way:
to develop external hardware to store the samples and then use microcontroller to retrieve the samples and send it to PC and display the sinewave.
external hardware:

ADC+ some logic+ memory

some logic will send control signals to ADC. Then it will have counter to put the data in the address specified by the counter.
We have to operate ADC with more than 20Mhz clock , which is not a problem.
But sending control signals to ADC (Start, ALE, OPE) needs some thinking.
so any suggestions about how to do this..