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diy vga signal from ram

M

mike

Jan 1, 1970
0
ok, here i go, perhaps i little clearer this time;

i have looked at vga timing specs and at max graphics mode res.
(640*480*256), i think the data sourcing (from ram), and subsequent signal
generation suitable for standard vga compliant monitor is possible with
cheap of the shelf components. i don't want to go down the road of pic or
fpga. i don't want to try to implement any hardware acceleration, just
output contants of ram to monitor. not tv.

replies already received suggest it is an acheivable goal, and continuing
research on the net has unearthed another similar and successful project.

it's just something i want to do for fun and i wonder if anybody has any
relevant experience they wouldn't mind sharing.

re. the article by enoch hwang in circuit cellar, i don't suppose anyone
could post a copy, i've paid my $1.50 online but the password popup didn't
appear to function.

thanks for any info received. apologies to anyone who finds my presence a
nuisance.

mike
 
I

Ian Stirling

Jan 1, 1970
0
mike said:
ok, here i go, perhaps i little clearer this time;

i have looked at vga timing specs and at max graphics mode res.
(640*480*256), i think the data sourcing (from ram), and subsequent signal
generation suitable for standard vga compliant monitor is possible with
cheap of the shelf components. i don't want to go down the road of pic or
fpga. i don't want to try to implement any hardware acceleration, just

How do you intend to fill the RAM?
 
M

Mike Harrison

Jan 1, 1970
0
ok, here i go, perhaps i little clearer this time;

i have looked at vga timing specs and at max graphics mode res.
(640*480*256), i think the data sourcing (from ram), and subsequent signal
generation suitable for standard vga compliant monitor is possible with
cheap of the shelf components. i don't want to go down the road of pic or
fpga. i don't want to try to implement any hardware acceleration, just
output contants of ram to monitor. not tv.

replies already received suggest it is an acheivable goal, and continuing
research on the net has unearthed another similar and successful project.

it's just something i want to do for fun and i wonder if anybody has any
relevant experience they wouldn't mind sharing.

re. the article by enoch hwang in circuit cellar, i don't suppose anyone
could post a copy, i've paid my $1.50 online but the password popup didn't
appear to function.

thanks for any info received. apologies to anyone who finds my presence a
nuisance.

It's certainly do-able in discrete logic, and you will learn a lot in the process of doing it, but
why bother learning what is an essentially obsolete skill... why not teach youself a more up-to-date
method by doing it on a micro or FPGA ? It will probably take a similar amount of time, but at the
end of it you will probably have a more useful (and marketable) knowledge base.
Xilinx do a $99 eval board which, coincidentally, incldudes a VGA port for doing exactly this....
 
B

Ben Bradley

Jan 1, 1970
0
How do you intend to fill the RAM?

May I suggest this: have two banks of RAM, one being read out by
the display circuitry while the other is available to be written and
read on a microprocessor bus. Have a bit on a port writable from the
processor that when 0 has bank A switched to the processor bus and
bank B displayed on video, and when set to 1 has bank B switched to
the processor bus and bank A displayed on video. You generally don't
want the processor to write to the active display RAM anyway.
If you can do the memory updating within one frame refresh time
(have a polled port available or do an interrupt at the vertical
retrace so the processor can sync to it), and switch frames at the
vertical retrace, and you can do "full animation."

But all this will soon be a lost art, as non-CRT displays will
continue to fall in cost and change to a digital-only connection to
computers.
 
R

Rich Grise

Jan 1, 1970
0
May I suggest this: have two banks of RAM, one being read out by
the display circuitry while the other is available to be written and
read on a microprocessor bus. Have a bit on a port writable from the
processor that when 0 has bank A switched to the processor bus and
bank B displayed on video, and when set to 1 has bank B switched to
the processor bus and bank A displayed on video. You generally don't
want the processor to write to the active display RAM anyway.
If you can do the memory updating within one frame refresh time
(have a polled port available or do an interrupt at the vertical
retrace so the processor can sync to it), and switch frames at the
vertical retrace, and you can do "full animation."

But all this will soon be a lost art, as non-CRT displays will
continue to fall in cost and change to a digital-only connection to
computers.
Do they still make video RAMs, with two address buses? They have sort
of an input side and an output side, and supposedly they can be clocked
independently.

I built a TV typewriter, and I think I based the processor clock on
the video clock and just interleaved bus cycles.

The thing I was most proud of was pipelining the data to/from the
character ROM to give it a couple of cycles to respond at leisure. :)
You do have to adjust the video timing so the chars still land on the
screen. ;-)

Cheers!
Rich
 
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