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Divide by N parallelling diodes

Discussion in 'Electronic Design' started by Kevin Brooks, Mar 20, 2007.

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  1. Kevin Brooks

    Kevin Brooks Guest

    I am using a CD4040 to divide down a clock frequency. I would like to
    connect several outputs in parallel with diodes to make their divisors
    additive. The output is then between their common and a 1M pull-up

    I have tried everything I can think of to make this work. I am tying
    reset to ground, but something tells me this is not right. What I get
    doing this is a pulse train, with each pulse less than 50% duty cycle.

    Unable to find anything online. Can somebody tell me the proper way?

    Thank you,

    Kevin Brooks
  2. GPG

    GPG Guest

    Put a pullup on the reset and connect diodes, anode to reset, to the
    outputs. Use 2nd MSB as output.
  3. GPG

    GPG Guest

    Should be MSB-1 output
  4. Robert Baer

    Robert Baer Guest

    That scheme cannot possibly work.
    Get a sheet of graph paper and draw a number of signal lines; the
    first being the (clock) data input line and the others erpresenting the
    outputs of interest.
    Use the datasheet for help.
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