O
[email protected]
- Jan 1, 1970
- 0
Don't have the old thread anymore, they roll of after two months on my PC..
But let me try.
I'm going through the google groups page I initially found, which has the whole history:
https://groups.google.com/forum/#!topic/sci.electronics.design/YZJz8Ys8KuU
Careful with the stock situations at distributors if this is for production.
Doesn't look too great IMHO. The SN65HVD24 looks ok though.
Yeah, I watch that when I select parts. At least for now Maxim has been able to provide parts directly when needed. But a) right now I'm just grasping at straws for anything that will work, and b) a discrete solution with multi-source parts (e.g. 74xx gates) fixes the problem ;-)
If it's any comfoert, my programming skills are ... lacking ;-)
I don't have the PDF link but the stuff in your link can work. I assume
they aren't tied together but driven from different EQ sections. It's
hard on the drivers though because they are seeing two other active
100ohm loads plus the cable. This is where discrete solutions can be
better if you need more amplitude than what chips can deliver. Or
parallel a few for each EQ section.
One thing I haven't actually been able to figure out is how to compare discrete gates to standard 485 transceivers as far as how "hard" they drive thebus. This is where my lack of analog foo really bites: I'm pretty sure the info is there somewhere, but I don't know how to translate it. Given that some of the chips (like the sn65hvd53 iirc) claim to be "high-drive", it'd be really nice to have some concept of how to compare against e.g. a trioof 74Fxx gate outputs.
What I don't know is how you change the EQ settings when the
constellation of other nodes on the line changes. Something has to look
at the transitions and the ringing and change the EQ accordingly.
In theory I have a backchannel: the main bus runs at 500kbps-4Mbps, but I also have a 'slow-mode' receiver, which is just an R/C on the receive line. I'm going to be sandwiching the R/C in the middle of a pair of inverters in future rev's to avoid having to re-tune the R/C to the drive of the transceiver-of-the-day, however.
Basically, as long as the transmitter and receiver can actually send some approximation of a waveform, thus I can get a reasonable "PWM" out of the receiver, I can send e.g. 10% duty and 90% duty by just spamming 0x00 and 0xfe out the transmit UART. ~50-ish cycles(bytes) per bit, and the result at far end of the receiver's R/C circuit is a very slow serial sequence. Thisis the fallback mode I use to upload the stage-2 (fast-mode) bootloader tothe units over the bus.
As far as the iterative trial-and-error, my system can deal with a certain amount of packet loss, and I have packet counters that will be able to tellme if something is missing (master knows how many packets sent, can ask the units how many they received via slow-mode), and I can switch the EQ and see if it gets better or worse.
The main complication is that units will need to hear (and comprehend) not only the controller, but their neighbors - they "follow" in sequence to optimize the bus. That means I may end up having to tune each unit's *transmit* to a dumb receiver in the neighboring unit (since units are space-constrained), while also tuning the controller's receive on a continuous basis tokeep up with the units (since the controller is bigger).
Also, mind potential *PHUT* situations. For example, what if there is
suddenly a dead short and the line voltage goes from 36V to zero in
nanoseconds? That puts a hard 36V across all device, with a long line
maybe even more. This is going to be a differential transition, not
common mode against many chips would be fairly robust.
Yeah, definitely something I've had to deal with. The max13451 and sn65hvd24 have both been pretty robust with internal protections, but the max3292 not so much. I have provisions on the current PCBs for a 10V TVS across the coupled A and B lines, but that doesn't quite handle all the transients. The soft switching I use on the 36V supply (a max5947 "breaker" with EN, to not let the smoke out in a dead-short scenario) seems to be safe enough, but my unit test rig has a relay, and switching the relay while power is applied has resulted in some fried chips (and fried finger...).
Worse, the system will be upgraded at some point to include a TDR at the controller, which will rely on a dead-short relay in each unit to determine relative distances, so the bus will indeed be riddled with some "interesting" surge scenarios. The controller can switch off the 36VDC and engage a "dump" relay to clear the bus of potential before engaging the TDR, while allthe units have enough onboard capacitance to ride out the ~10ms measurement window.
I'll be adding a USB-style transient-protection chip to the input side (in addition to the TVS) in order to clamp the coupled A/B to the rails.