A
[email protected]
- Jan 1, 1970
- 0
Hi,
I am designing a multiple stage amplifier.
I have a first stage
differential amplifier using JFETs which gives output with a 5 volt
offset on the drain.
Now i want to amplify this signal more, i can't feed it to the
intrumentation amplifier without blocking capacitors. And i want to
avoid using blocking capacitors.
For this reason i was thinking to design another differential stage
using PNP BJTs to amplify as well as DC level shift the signal to 0
volts. Then if needed i can feed this to a instrumentation amplifier.
So currently, i am trying to design a PNP differential stage which can
take 5 volts as the base and collector around 0 volts. I have tried
some simulations in spice but can't get it working.
Can anyone help , please?
I am designing a multiple stage amplifier.
I have a first stage
differential amplifier using JFETs which gives output with a 5 volt
offset on the drain.
Now i want to amplify this signal more, i can't feed it to the
intrumentation amplifier without blocking capacitors. And i want to
avoid using blocking capacitors.
For this reason i was thinking to design another differential stage
using PNP BJTs to amplify as well as DC level shift the signal to 0
volts. Then if needed i can feed this to a instrumentation amplifier.
So currently, i am trying to design a PNP differential stage which can
take 5 volts as the base and collector around 0 volts. I have tried
some simulations in spice but can't get it working.
Can anyone help , please?