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delay cell

J

joe

Jan 1, 1970
0
Is there any suggestion for a simple delay
circuit capable of 90-deg and 45-deg delay?
I found an IEEE paper mentioned a 90-deg
delay cell containing 20+ transistors. Is there
a easier solution?

Thx.

Joe
 
M

Max Hauser

Jan 1, 1970
0
joe said:
Is there any suggestion for a simple delay
circuit capable of 90-deg and 45-deg delay?
I found an IEEE paper mentioned a 90-deg
delay cell containing 20+ transistors. Is there
a easier solution?


Yes indeed, "joe": a digital Hilbert-transformer approximation, preferably
FIR (with proper A/D/D/A conversion, sampling, and reconstruction on both
ends).

This is borrowed from the 1991 "180-degree phase shift" advice recently
re-posted on comp.dsp (and available from Google's "Groups" tab if it has
expired on your server) with a factor of 2 adjustment to fit the case. :)
:)

(Actually it's either very simple or very complex depending on the frequency
range of interest, and other requirements you'll need but haven't mentioned.
Be wary of glib answers here online.)

M
 
J

John Woodgate

Jan 1, 1970
0
Is there any suggestion for a simple delay
circuit capable of 90-deg and 45-deg delay?
I found an IEEE paper mentioned a 90-deg
delay cell containing 20+ transistors. Is there
a easier solution?
One cannot tell. You ask for a delay but state it as a phase-shift. They
are NOT the same. Please explain in more detail what you want to do, and
to what sort of signal.
 
J

joe

Jan 1, 1970
0
Yes, It's my fault. I need specify the clock speed. What I want
is a delay of a quarter clock period. For example, for a 5-G clock,
I want to design a circuit with 50 ps delay or more.

I know I could use a simple RC delay (or its distributed version). But it
certainly results in large losses. Cascading "amplifiers" might be another
solution, but it needs quite a few of them to realize so much delay.

I wonder if there is a better or standard solution for this problem?

All the best,

Joe
 
D

Don Lancaster

Jan 1, 1970
0
joe said:
Yes, It's my fault. I need specify the clock speed. What I want
is a delay of a quarter clock period. For example, for a 5-G clock,
I want to design a circuit with 50 ps delay or more.

I know I could use a simple RC delay (or its distributed version). But it
certainly results in large losses. Cascading "amplifiers" might be another
solution, but it needs quite a few of them to realize so much delay.

I wonder if there is a better or standard solution for this problem?

All the best,

Joe

And the problem with 35 feet of coax is?

--
Many thanks,

Don Lancaster
Synergetics 3860 West First Street Box 809 Thatcher, AZ 85552
voice: (928)428-4073 email: [email protected] fax 847-574-1462

Please visit my GURU's LAIR web site at http://www.tinaja.com
 
F

Fred Bartoli

Jan 1, 1970
0
Don Lancaster said:
And the problem with 35 feet of coax is?

35 feets for 50 ps ? Are you a new FTL cable nut ? :)


A short PBC track (about 1cm) will do.

thanks,
Fred.
 
B

Ben Bradley

Jan 1, 1970
0
In sci.electronics.design said:
And the problem with 35 feet of coax is?

That it's bout three orders of magnitude too long for a 50 ps
(picosecond) delay?

I'm rather confused by Joe's followup, myself. If he's talking
about cascading gates to get a delay, maybe he really does mean 50 ns
(nanoseconds). And what does "delay cell" mean? Is this delay thing
part of a discrete circuit, or part of an IC? That much time delay
corresponds to a little less than half an inch, not a problem for
trace length on a PCB, but a lot inside an IC.
And what is a "5-G clock"? Five gigahertz? I can surely understand
informalities when all parties have already been introduced to a
circuit/problem/situation, but please, the first time you post
something, spell things out.
I checked, 50 picoseconds is indeed 1/4 of a clock period of a 5
gigahertz signal, but I had to calculate that to be sure. You'll get a
lot more help, and a lot faster, if you don't make the readers of your
post guess at the basic units you're using.
 
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