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DDR2 Vdd and signal levels...

Discussion in 'Electronic Design' started by Fred Bartoli, Aug 19, 2007.

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  1. Fred Bartoli

    Fred Bartoli Guest

    Ok, I thought assembling a PC from parts was a nobrainer. Pick what you
    want, assemble and it should work.
    Standards are there to that purpose.

    Well, no quite. I just got caught with DDR2 rams.
    Picked the mobo, proc,... and that fast DDR2 ram.
    No Boot, beep, beep, beep....

    A few tries... Swapping the ram from another PC, and bingo all run nicely.

    A bit of investigation later, arghhh, the mobo supports ram voltage up to
    1.95V and is defaulted by the bios to 1.8V while the fast ram wants 2.2V

    Now the PC runs with the new ram at 1.95V but of course with degraded
    timings.
    Of course all those voltage limitations aren't in the mobos manuals (you
    have to discover this once all is installed) so it'll be a pain to RMA it
    and look for another one that fits.

    OTOH it's easy to modify the ram vdd controller to get the required
    voltage, but... the question is how are handled the signal levels WRT to
    the other elements on buses?
    I've noticed on some datasheets there's a reference voltage input on the
    DDR2 ram chips, but that doesn't tell all the story, so...
    Is there more to change the ram supply voltage than simply changing it or
    can I go safely with this?

    Any enlightened hint?
     
  2. PeteS

    PeteS Guest

    All DDR (1,2,3 etc) memory uses Vref = Vmem/2 for a number of reasons,
    not least as it sets the effective clock crossing. Vref *should* be
    generated directly from the Vmem supply. If it is (which it is supposed
    to be) then simply increasing the Vmem supply should be ok.

    As to other things on the bus - DDR busses can't easily be shared, so
    the only things on those busses should be the DDR.

    Cheers

    PeteS
     
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