dc convert

I need to convert -12vdc to +12vdc has any one any ideas as to a cheap and
cheerful way of achieiving this.

Thanks

 

The quick and obvious answer is to swap the ground connection. More
seriously, it depends a great deal on what you intend to do with it -
how much power do you need to deliver?

d

Pearce Consulting
http://www.pearce.uk.com

 

I built a cheap and easy charge pump with a 40106 hex schmitt trigger.
One gate configured as an oscillator (10k, 100pF) driving 5 gates
paralleled. They feed a 100nF + 2x1N4148 + 1uF charge pump, and happily
supply -11V at 15mA, with a negligible temperature rise (cant measure it
with my IR thermometer so its <= 5C)

and did I mention *CHEAP*

Cheers
Terry

 

I need about 100mA at 12vdc?

-------------------------------------------------------
Paul Taylor BSC (Hons)
Electronics Technician
School of Environmental Science
University of East Anglia
Norwich
NR4 7TJ

Phone: +44 (0)1603 592502
Fax: +44 (0)1603 591327

Email:
Web: http://www.uea.ac.uk/~e087

--------------------------------------------------------

 

The classic booster regulator that thinks it is making 24V from 12V is one
way to do this. Do you need a regulated +12V and is the -V regulated?

If thinks break your way on those questions, there are many single chip
plus a few discretes solutions.

Since the +12V is a lot more than a diode drop, you can use a common base
stage to transfer the feedback from the (+12-GND) down to an offset from
the -12V.

 

the -12vdc is unregulated the 12vdc needed can be either. I was hoping of a
discrete way of doing this if possible.

 

You can buy a packaged, isolated dc-dc converter for well under $10.
See the Mouser or Digikey catalogs.

John

 

use a CMOS 555 timer as the oscillator, and do the same thing then

Cheers
Terry

 

Try MC34063, quite cheap, and
http://schmidt-walter.fbe.fh-darmstadt.de/smps_e/vgw_smps_e.html
for design info

martin

"An eye for an eye makes the whole world blind"
Gandhi

 

How about this:


Try feeding this into LTspice and see if my idea works.

C2
----!!-----
! !
! R2 !
GND ------+------+-+-\/\/-+--+
! ! ! !
! e\! ! )
! Q2 !---- )
! /! ) L1
! ! )
! ! ! D1
! ! +---->!-+-----+----- +12V
e \! ! R1 ! ! !
Q1 !----+-+--/\/\---+ 13V /-/ --- C1
/! ! ! D2 ^ ---
! ! ! ! !
! +---------- ! ------+ !
! ! ! !
! !!- d GND
+---------------!! Q3
! !!- s
\ ! !
R3 / \ R4 -12V
\ /
/ \
! /
-12V !
-12V


We will start with a simple discription and then fill in some non-obvious
details. For now ignore C2.


R4 turns on Q1, which pulls up on R3 turning on Q3.

Q3 being on, pulls down on L1. This does two things. A current starts to
build up in L1 and R1 provides so extra bias to Q1. This extra bias will
become important later.

The current in L1 build up and eventually becomes enough to cause one
diode drop on R2. This biases on Q2 which shorts out Q1's emitter base
junction shutting it off. R3 pulls down Q3's gate and Q3 turns off.

When Q3 turns off, the voltage on the drain of Q3 goes positive because
the current in L1 can't stop instantly. The current is forced to flow
through D1 and charge C1 up to the 12V output we want.

If you look at what R1 is doing now, you will notice that it will be
trying to turn off Q1. If R1 is much less than R4, it will win the tug of
war and force Q1 to remain off.

As the energy stored in L1 is transfered to C1, the current in L1 is
decreasing. When the current hits zero, the voltage on the L1 falls back
down towards the ground. At some point, the voltage on R1 gets low enough
that R1 can no longer prevent R4 from turning Q1 on and the cycle will
repeat.

If the output voltage attempts to go above (13V- 1 diode), D2 will be
biased on. D2 also will prevent Q1 from turning on and thus the voltage
is (sort of) regulated just at the point where D2 conducts.

A few details:

During start up we don't yet have 12V on C1. At this time we can't expect
the drain of Q3 to swing more than a diode drop above ground. This means
that R1 doesn't prevent Q1 from turning back on again as discribed above.

Instead, we have a more complex set of factors setting the delay:

The above assumed that Q2 turned on like a switch when its base voltage
went above one diode drop. This is not true. The transconductance of Q2
is not infinite. The base voltage on Q2 must rise high enough that a
large fraction of the sum of the R1 and R4 currents are flowing in it
before it will start to bias Q1 off.

When Q2 is not yet robbing base drive, Q1 is biased on very hard by R1.
This means, it is very saturated and lots of carriers are stored in its
base. Even if Q2 suddenly took away all the base drive, Q1 would not
start to turn off for perhaps a few microseconds. Even when Q1 does start
to turn off it takes a bit of time for R3 to discharge the gate of Q3.

Adding all this extra time up, we know that a fair chunk of time will pass
from when the voltage on R2 hits the required voltage and Q3 actually gets
turned off. As a result the current in L1 will have risen a bit above
this critical level.

Imagine that the voltage on the drain of Q3 only goes to one diode above
ground and stops there. Even in that case, Q2 suddenly needs only to pass
a little less than R4's current when it has enough base drive to pass both
R1's and R4's. The current in R2 will have to decrease a fair bit before
Q2 will turn off and let Q1 turn on again.



C2 is needed because L1 will have some stray capacitance that would
normally make a spike on R2 each time Q3 switches. C2 is just big enough
to round off that spike to prevent it from causing trouble.