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Datasheet duty cycle "@ 1khz"

Discussion in 'Electronic Design' started by Jon Slaughter, Jan 20, 2009.

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  1. What exactly is meant by @ 1khz? value should be somewhat independent of
    frequency?

    e.g., 100mA peak current at 1/10 duty @ 1khz. What ist he peak current
    approximately if I run it at 10khz?
     
  2. Bill Sloman

    Bill Sloman Guest

    The implication is that whatever gets warm when run at 100mA has an
    appreciable thermal capacity, so it doesn't warm up too much if run at 100mA
    for 100usec, provided that y9ou let ti cool off for the next 900usec.

    It will warm up even less if run at 100mA for 10usec, but the extra heated
    dissipated in the device wihile it is switching between on and off (and back
    again) will probably wipe off any advanatge you might hope for.

    Unfortunately, the heat generated while the current is high will increase
    not only in proportion to the current but also with the voltage drop across
    the relevant part of the device, which can rise very rapidly indeed with
    increasing current when you push the current above specification.
     
  3. PeterD

    PeterD Guest

    Think about running that duty cycle at .01 hz, does that help?
     

  4. Nope. Why not just run it at 0.0000001nHz?

    Obviously as the duty cycle approaches 1 the peak current approaches the
    average current. Also for very low frequencies the peak current approaches
    the average current for a large time frame. (e.g., why not a duty cycle of
    10^(-8) but a frequencfy of 10^(-1000000)

    Ask your same question but with 10khz, then what? Because peak current is
    independent of frequency, at least for all reasonable ranges, I would expect
    no change. But what is a reasonable range? 10khz to 100hz? or what?

    My question, again, is why they give 1khz? What if I want to run at another
    frequency? What about 1Mhz?
     
  5. So why not give a graph? Or are they saying 1khz is the optimal? i.e.,
    ideally the peak current should be independent of frequency but it's
    obviously not. But they give no clue as to it's relation.
     
  6. TTman

    TTman Guest

    Probably the same, for all practical purposes.
     
  7. Bill Sloman

    Bill Sloman Guest

    Some people do. It takes more work to produce and makes the data
    sheet longer
    They shouldn't need to. The point is that the circuit would get too hot
    if the 100mA was sustained for any extended period of time.

    The circuit might get hot enough to burn out if you sustained the 100mA
    for only one second, but the data sheet does tell you that if you sustain
    the
    100mA for 100usec and then leave it to cool off for 900usec, the circuit
    will survive.

    Presumably this is enough information for the people to whom they
    expect to sell most examples of the circuit

    Ring up the applications department, or send them an e-mail, if you
    want to learn more.
     
  8. Guest

    I'd have to see the datasheet, but this sounds like a limitation based
    on electromigration. If you PWM faster than a millisecond, then the
    average current in the metal path can be used in design for
    electromigration limits, rather than the peak current.

    A good example of this is the MAX7219. You will notice the digit
    drivers are not sequential around the chip. This is to produce average
    current in the metal paths, rather than peak. Think of it as the
    firing order of a V-8, i.e. not sequential, but spread out for balance.
     
  9. Guest

    The reason that a frequency is given has to do with the thermal time
    constant of the device. If the on time is equal to the thermal time
    constant, then the temperature rise will reach will reach 63% of the
    temperature rise at 100% duty cycle. One year on and on year off is a
    50% duty cycle. So is 1nsec on and 1 nsec off. See the following
    website for a nice write-u:. http://www.aosmd.com/pdfs/appNotes/character_mosfet.pdf.
    Regards,
    Jon
     
  10. The reason that a frequency is given has to do with the thermal time
    constant of the device. If the on time is equal to the thermal time
    constant, then the temperature rise will reach will reach 63% of the
    temperature rise at 100% duty cycle. One year on and on year off is a
    50% duty cycle. So is 1nsec on and 1 nsec off. See the following
    website for a nice write-u:.
    http://www.aosmd.com/pdfs/appNotes/character_mosfet.pdf.
    Regards,
    Jon

    ------------

    So given figure 3 it seems that higher frequency doesn't have much
    benefit... at least for the mosfets under question.

    Thanks,
    Jon
     
  11. Guest

    I'm having a problem with the term normalized transient thermal
    resistance, basically normalized to what? I think you are obsessing on
    this too much. The 1ms rule is very common in process design rules.
    Basically, if you cycle in 1ms or faster, treat the electromigration
    rule as the DC average. If you really want to agonize over this, you
    can google pulsed electromigration.

    Unless I missed it, you didn't spec the part in question. If it is
    power dissipation, if you meet the 1ms rule, use average power then
    check to see if the junction temperature is in spec.

    I never had a chip fail BU QA under the 1ms rule.
     
  12. JosephKK

    JosephKK Guest

    The question you are asking makes clear just how badly you are missing
    the point. It is a simple statement of test conditions; like @ 25
    degrees C. It is intended as an aid in replicating the test
    conditions in order to compare your own test data.
     
  13. Guest

    I'm guessing you filter google posters. I've answered this question
    already. Dig up papers on pulsed electromigration if you want the
    details, but 1ms minimum pulse width is a pretty typical process
    design parameter. [Not every foundry spells it out, but if you ask,
    1ms is the number. I have to assume it is guardbanded.] Run faster
    than 1KHz, use average current, and it should be fine.
     
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