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D-type edge triggered flip-flop

Discussion in 'General Electronics' started by Student, Dec 17, 2003.

  1. Student

    Student Guest

    Hello,
    I have just completed reading C. Petzhold's "Code. The hidden language
    of computer hardware and software" (I think I need not tell you how
    great this book is).

    There is, however, something I do not grasp. The author explains how
    to build a set/reset counter based on a collection of D-type edge
    triggered flip-flops, and still I fail to understand how to set/reset
    this counter's lowest output bit (which is crucial to branching).
    Please, would you be kind enough as to point out my mistake, or
    perhaps, suggest a source for an alternative solution?

    Thank you very much for your time.

    A. Student
    P.S. And one more question, in case you kindly decide to put up with
    me. Does the clock signal have to be disconnected for this counter to
    be reset?
     
  2. Post a schematic of the circuit in the question; on
    .

    Or, failing that, I think I could set up a small FTP dir on one of my
    websites, where you could upload it.

    Let me know.

    Cheers!
    Rich
     
  3. Student

    Student Guest

    Dear me! I have never used alt.binaries.schematics.electronic before,
    so I think I would just cause too much trouble asking how to do it. I
    am so ashamed of myself, I am sorry.
    .... I sure would, I am sorry ...
    Oh dear! I simply meet all the most wonderful people here on Usenet.
    THANK YOU VERY MUCH INDEED. Again, I would not know how to FTP. Shame
    on me.
    Thank you very much for the most encouraging words. You see, I have
    learned a very nice notation for representing the logic gates
    circuitry from another most kind and helpful person here on Usenet. If
    you do not mind, I will use it to specify the circuitry in question.
    (So, here goes.)

    This is a set/reset D-type edge triggered flip-flop (all schematics
    are due to Mr. C. Petzhold /Code/. The notation is due to another
    genius who, I think, does not wish to be mentioned. I am most greatful
    to/for both.)

    .------------.
    | |
    RESET | .---. |
    o-----------------o>| | |
    .-------->|NOR|-. |
    | .>| | | |
    | | '---' | |
    | .-|-------' |
    | | | |
    | | '-------. |
    | | .---. | | .---.
    SET | '-->| | | '>| | Q
    o-------o-|----o--->|NOR|-o----->|NOR|-o-----o
    | | | .->| | | .>| | |
    | | .---' '---' | | '---' |
    | | | | | .-|-------'
    | | | | | | |
    | | | | .--------' | '-------.
    .---. | | | | | .---. | .---. |
    CLK | | | | | | '->| | '-->| | | ~Q
    o->|NOT|-|-|--o-|--->|NOR|-o-. .->|NOR|-o-----o
    | | | '-------o>| | | '-|->| |
    '---' | | | '---' | | '---'
    | |.-|-------' |
    | || | |
    | || '-------. |
    | || .---. | |
    | |'-->| | | |
    DATA | '--->|NOR|-' |
    o--------|---------->| | |
    | '---' |
    '---------------------'

    abbreviated as:

    RESET.---.
    o--| |
    SET | | Q
    o--| n |--o
    CLK | | ~Q
    o--| |--o
    DATA | |
    o--| |
    | |
    '---'

    So, (for example) a 4-bit set/reset (natural binary code) counter
    looks like this.

    .-----. |
    o->| | |this NAND gate serves as
    |NAND |-o-. |the clock signal
    .>| | | | |generator
    | '-----' | | |(I have some doubts here, too)
    '---------' | |
    .-------------' |
    |
    | .-----. |
    | .>| | |the lowest bit of the counter
    o-| |NAND |-. |is simply
    | '>| | | |the negated clock signal
    | '-----' | |
    | |
    | |
    | .---. | .---. .---.
    .--->| | | .--->| | --->| |
    || | | | | | | | | |
    .---->| 1 |--.|.---->| 2 |--. .---->| 3 |--.
    ||| | | |||| | | | || | | |
    ||'-->| |-o------->| |-o------->| |-o|
    || | | ||||| | | || || | | ||
    || .->| | ||||| .->| | || || .->| | ||
    || | '---' ||||| | '---' || || | '---' ||
    || '--------'|||| '--------'| || '--------'|
    || |||| | || |
    || |||| | || |
    || |||| | |'---------------o RESET NBC-3
    || |||| | '----------------o SET NBC-3
    || |||'------------------------------o RESET NBC-2
    || ||'-------------------------------o SET NBC-2
    |'---------------------------------------------o RESET NBC-1
    '----------------------------------------------o SET NBC-1
    || | | ?-o RESET NBC-0
    .-------------------------------------------' ?-o SET NBC-0
    | || |
    | .----------------------'
    | | ||
    | | .-''--.
    | | | |
    V V V V
    NBC-3 NBC-2 NBC-1 NBC-0 NBC=Natural Binary Code

    So the counter should output:

    NBC-3 NBC-2 NBC-1 NBC-0
    0 0 0 0
    0 0 0 1
    0 0 1 0
    0 0 1 1
    0 1 0 0
    0 1 0 1
    0 1 1 0
    0 1 1 1
    1 0 0 0
    1 0 0 1
    1 0 1 0
    1 0 1 1
    1 1 0 0
    1 1 0 1
    1 1 1 0
    1 1 1 1 (here the counter will rewind)
    0 0 0 0
    0 0 0 1
    0 0 1 0...

    I intend to use this counter as an Instruction Pointer in an 8088
    circuitry I am working on. The problem lies in setting/resetting the
    lowest bit of this counter, i.e. the NBC-0 bit. (I have some other
    doubts too, the one I mention is the primary one.)

    I understand I am taking a lot of your time asking this question, so
    thank you very very much for your interest.
    All the best,

    Tom
     
  4. Student

    Student Guest

    Hello Richard,
    I am terribly sorry for the second schematic's misalignments. The
    justification I have is that I *DID* use the /Preview message/
    function before I posted. It all looked fine. Perhaps you are still
    there so I will attempt to send a less lengthy (a three bit) version
    of the counter.

    This abstraction of the previously mentioned D-type set reset edge
    triggered flip-flop will hold here.

    RESET.---.
    o--| |
    SET | | Q
    o--| n |--o
    CLK | | ~Q
    o--| |--o
    DATA | |
    o--| |
    | |
    '---'

    So a 3-bit natural binary code counter looks like this:

    .-----. |
    o->| | |this NAND gate
    |NAND |-o-. |serves as
    .>| | | | |the clock signal
    | '-----' | | |generator
    '---------' | |
    .-------------'
    |
    | .-----. |
    | .>| | |the lowest bit
    o-| |NAND |-. |of the counter
    | '>| | | |is simply
    | '-----' | |the negated
    | | |clock signal
    | |
    | .---. | .---.
    .--->| | | .--->| |
    || | | | | | |
    .---->| 1 |--.|.---->| 2 |--.
    ||| | | |||| | | |
    ||'-->| |-o------->| |-o|
    || | | ||||| | | ||
    || .->| | ||||| .->| | ||
    || | '---' ||||| | '---' ||
    || '--------'|||| '--------'|
    || |||| |
    || |||'---------------o RESET NBC-2
    || ||'----------------o SET NBC-2
    |'------------------------------o RESET NBC-1
    '-------------------------------o SET NBC-1
    || | ?-o RESET NBC-0
    || | ?-o SET NBC-0
    .---------------------------'
    | ||
    | .------'|
    | | .-'
    | | |
    V V V
    NBC-2 NBC-1 NBC-0

    NBC=Natural Binary Code

    The problem lies in setting/resetting the lowest bit of this counter,
    i.e. the NBC-0 bit.


    I am very sorry for the earlier slippage in accuracy. It was due to my
    inexpert using of the posting facilities.

    Thank you very much for bearing with me.


    All the best,

    Tom
     
  5. Student

    Student Guest

    Richard,
    Please, may I have your kind advice on what to do in case my second
    post's schematic becomes misaligned too.

    Thank you.

    Tom
     
  6. Student

    Student Guest

    I have a textfile which incorporates the schematic and my question.
    Please, would you still be interested in having a look at it (if so,
    where do I upload it)?

    I am sorry for the trouble.

    Thank you.

    Tom
     
  7. Rich Grise

    Rich Grise Guest

    Hi. This is Rich again, posting on an alias. :)

    I saw your ASCII schematic, and have your answer.

    The reason you can't preset the LSB to zero is that you're
    mistakenly calling the clock the LSB. It isn't. It's the
    clock. You need another flip-flop, which _can_ be reset,
    to give you bit 0, and run the clock at twice the frequency.

    The first stage of any counter is always a flip-flop of
    some kind, and bit 0 is clock/2.

    A free-running clock can't, and probably shouldn't, be
    reset arbitrarily.

    If you used D flip-flops in a chip, like the venerable
    7474 (LS74, HC74, etc), the reset is independent of the
    clock, or asynchronous. I haven't analyzed your D-FF made
    of NORs yet, but that sounds like it's just up your alley. ;-)

    Good Luck!
    Rich
     
  8. Student

    Student Guest

    Good day, Rich,
    It is a relief to hear from you again. :)
    Actually, I thought you were put off by my incompetent using of the
    posting facilities.
    You did?
    Oh, thank you so much.
    Right. I see.
    Yes indeed. Brilliant idea. (My problem is that every time I run into
    a difficulty I do not trust my intuition and need to be told the
    solution by someone whose comptence in the given respect shows
    confidence and ease. Thank you.)
    Yes. I see.
    Surely, I will make a fool of myself now. For someone
    with broad knowledge the 74's would indeed be an alternative.
    For me, unfortunately, they are not. If I used them as means
    of construing the entire circuitry I would run into
    a lot of difficulties concerned with e.g. the maximum
    embedding of fuctions realized by chips concerned with
    the maximum current the chips can withstand while preserving
    their functionality. I feel I would not be able to resolve these.
    My first draft of the machine was on paper, then I read /Code/,
    and now I am implementing everything in Excel.
    I used to know a man as great as you. JUST in the right time
    he suggested me reading A. Turing's "Computing Machinery...".
    I will be thankful to him for the rest of my life.

    Thank you for your time.

    All the best,
    Tom

    P.S. Would you, perhaps, be kind enough as to write a line
    of comment on the way I am implementing my Turing Machine?
     
  9. Student

    Student Guest

    Dear Richard,

    Have a most enjoyable Christmas,
    and a truly Happy New Year.

    Thank very much again for your time.

    Tom
     
  10. Rich Grise

    Rich Grise Guest

    This is a very good point. Now I'll have to go back and get your
    original circuit, and lift the circuit out of the 7474 data sheet,
    and compare. };->
    Well, I don't know what "then I read /Code/" means, but I know
    what Excel means; if you can do combinatorial logic to
    the degree that you can build a sequential element, you
    should be able to construct or find (!) a sequential primitive
    of some kind. (like =if (S(tn-1), "True","false"). In that
    case, I'd much rather just do a straight resettable D flip-
    flop as a primitive itself. You wouldn't have to string
    together three truth tables in a row (or circle!) just to
    get an edge trigger. :)

    Hope this Helps!
    Rich
     
  11. Rich Grise

    Rich Grise Guest

  12. Student

    Student Guest

  13. Student

    Student Guest

    Thank you. Please, do not worry.
    Yes. I am sorry. By /Code/ I mean a book by C. Petzhold "Code. The
    hidden language of computer hardware and software".
    I managed to do that. Thank you.
    I did that too. Thank you.
    Actually, you are the only person who I can discuss my work with. It
    helps tremendously to have someone to talk to. I greatly appreciate
    your kind interest.

    Thank you very much for your time.

    All the best,

    Tom
    P.S. Please, would you, perhaps, know of an internet resource
    contaning a technical reference for the Intel 4004 chip? I googled for
    it, but the result was very limited (this is the chip I am CURRENTLY
    attempting to build).
     
  14. usao

    usao Guest

    Tom

    For anyone interested, I have a complete Intel 4004 system with
    clock/memory and I/O. I also have all the chips, motherboard,
    schematics and documentation for the system. It's on an eBay auction
    currently.
    Ron
     
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