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D Flip-Flop

Discussion in 'General Electronics Discussion' started by RaevenCogan, Mar 22, 2011.

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  1. RaevenCogan


    Mar 13, 2011
    Hey guys :) I'm having some trouble on this sequential logic circuit. What I don't understand is what the illustration means by "D flip-flops store the current outputs between clock pulses." :confused:

    Attached Files:

  2. Neal


    Dec 23, 2009
    The output stays at the same state til the next clock.
  3. RaevenCogan


    Mar 13, 2011
    Thanks Neal :) but how does an inverter do this?
  4. (*steve*)

    (*steve*) ¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd Moderator

    Jan 21, 2010
    Not just an inverter. That circuit has an inverter and 4 nand gates.

    The inverter ensures that the inputs will be different. The inputs are actually the 2 outer connections to the first pair of nand gates. The clock input ensures that the output of these pair of gates only changes to a value that can affect the flip-flop (the last pair of nand gates) when the clock input is high. The flip flop "remembers" the last valid state.
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