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D Flip Flop Question

Discussion in 'General Electronics Discussion' started by pattoc, Nov 25, 2015.

  1. pattoc

    pattoc

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    Nov 25, 2015
    Hi everybody,

    I have a question regarding the 7474 IC (D Flip Flop) that I am hoping someone could answer. I fully understand how it works (I think). And using a 555 timer that generates a 1Hz signal that feeds the Enable, I am able to make the 7474 chip work as expected.

    However, if I remove the 555 timer from the circuit and try to manually control the Enable by moving a wire to 0 and 1 back an forth to simulate a clock signal, the D Flip Flop no longer works as expected.

    Could anybody explain why this wouldn't work? I was expecting the D Flip Flop to still react (to any change in D) when I manually move from 0 to 1 with the wire leading into the Enable.

    Please note that my background is Programming and I am mostly self taught in this area so there may be holes in my knowledge. (Sorry.)

    Thank you very much for your help.
    Pat
     
  2. AnalogKid

    AnalogKid

    2,289
    646
    Jun 10, 2015
    First, I would think that the 555 would drive the clock input, not the enable. Second, thee is no enable input to a 7474. So answering your question will be difficult until you provide better information.

    And a schematic. In an electronics forum, *everything* revolves around the schematic. Please post yours.

    Finally, there is a big difference between a 1 Hz electronic signal and manually making contacts touch. When switches or wires touch, the contact area "bounces". That is, it makes and breaks contact several times in 1/1000th of a second. Since a 7474 can respond in less than 1/10th of a microsecond, this causes what appears to be random problems. There are ways around this.

    ak
     
  3. dorke

    dorke

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    664
    Jun 20, 2015
    Let me add,
    "7474" is a generic name.
    Please provide the full part name including all the letters in it-they are very important .
     
  4. pattoc

    pattoc

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    0
    Nov 25, 2015
    Thank you for your reply. And sorry for the lack of details and errors...

    The chip I am using is SN74LS74AN.

    And yes, the 555 timer (HAI7555) is driving the clock input (which I falsely called the Enable throughout my initial message). Sorry.

    I have attached a diagram that will hopefully explain the circuit well enough. I am happy to provide another form of diagram if it would help.

    diagram.png

    I guess I don't understand why the "bounces" would impact this particular circuit. Perhaps the D flip flop is implemented differently than I thought.

    Thanks,
    Pat
     
  5. dorke

    dorke

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    Jun 20, 2015
    A floating input with LS logic is possible and yields a "logic '1' interpretation" by the IC.
    In general it is not recommended,better use a proper pull up resistor (1k ohm).
    The 74 is a positive edge triggered DFF:a rise in the CLK signal from '0' to '1' will cause Q=D.

    Using a "mechanical switch" to drive the CLK signal is a very bad practice.
    since the contact achieved is not a "single smooth" transition signal .
    it creates many(unpredictable number) of transitions before getting to the final "state" of on or off.
    These are called bounces.
    And need to be de-bounced to allow proper use of switches in such applications.
    SW-bounce.jpg


    It is not entirely clear what you are actually doing.(It is best you draw that).
    What is the '0' and '1' you are using ?
     
  6. pattoc

    pattoc

    4
    0
    Nov 25, 2015
    Thank you for the bouncing information. You've opened my eyes! I was very unaware of high number of bounces. I think that likely explains the bad results I'm getting.

    I have attached a photo of my circuit with comments to further explain the issue. But I'm not sure that there is anything else to add (unless there is an easy solution to deal with the bouncing issue).

    Also, if anybody has any general suggestions about anything on the circuit, please let me know. I am self taught and I'm sure I am breaking a few sacred rules. :)

    Thanks again for all the help.
    Pat
     

    Attached Files:

  7. dorke

    dorke

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    Jun 20, 2015
    Here is a simple and common switch de-bouncing circuit:
    debounce.jpg
     
  8. pattoc

    pattoc

    4
    0
    Nov 25, 2015
    Thank you again for all your help. You're awesome! :)

    I appreciate it.

    Thanks,
    Pat
     
  9. dorke

    dorke

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    Jun 20, 2015
    Your welcome.:cool:

    Another issue is decoupling capacitors.
    From your photo I see you don't use any.
    It is a good practice to use 0.1uF ceramic caps on the VCC and GND pins,
    use one with shortest leads possible for the 74LS74.

    And,
    better use decoupling on the voltage regulator as well (look at the data sheet for recommendations).
     
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